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This commit is contained in:
IndecisiveTurtle 2024-08-23 13:40:16 +03:00
parent 64bba7f14f
commit 95a97723ba
4 changed files with 8 additions and 9 deletions
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4
src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
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@ -196,8 +196,8 @@ Id EmitImageQueryLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords) {
return ctx.OpImageQueryLod(ctx.F32[2], sampled_image, coords); return ctx.OpImageQueryLod(ctx.F32[2], sampled_image, coords);
} }
Id EmitImageGradient(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id EmitImageGradient(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id derivatives,
Id derivatives, const IR::Value& offset, Id lod_clamp) { const IR::Value& offset, Id lod_clamp) {
const auto& texture = ctx.images[handle & 0xFFFF]; const auto& texture = ctx.images[handle & 0xFFFF];
const Id image = ctx.OpLoad(texture.image_type, texture.id); const Id image = ctx.OpLoad(texture.image_type, texture.id);
const Id sampler = ctx.OpLoad(ctx.sampler_type, ctx.samplers[handle >> 16]); const Id sampler = ctx.OpLoad(ctx.sampler_type, ctx.samplers[handle >> 16]);

4
src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
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@ -387,8 +387,8 @@ Id EmitImageFetch(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, const
Id lod, Id ms); Id lod, Id ms);
Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, u32 handle, Id lod, bool skip_mips); Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, u32 handle, Id lod, bool skip_mips);
Id EmitImageQueryLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords); Id EmitImageQueryLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords);
Id EmitImageGradient(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id EmitImageGradient(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id derivatives,
Id derivatives, const IR::Value& offset, Id lod_clamp); const IR::Value& offset, Id lod_clamp);
Id EmitImageRead(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords); Id EmitImageRead(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords);
void EmitImageWrite(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id color); void EmitImageWrite(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id color);

2
src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
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@ -329,7 +329,7 @@ void EmitContext::DefinePushDataBlock() {
void EmitContext::DefineBuffers() { void EmitContext::DefineBuffers() {
boost::container::small_vector<Id, 8> type_ids; boost::container::small_vector<Id, 8> type_ids;
for (u32 i = 0; const auto& buffer : info.buffers) { for (u32 i = 0; const auto& buffer : info.buffers) {
const auto* data_types = &F32;/*True(buffer.used_types & IR::Type::F32) ? &F32 : &U32;*/ const auto* data_types = &F32; /*True(buffer.used_types & IR::Type::F32) ? &F32 : &U32;*/
const Id data_type = (*data_types)[1]; const Id data_type = (*data_types)[1];
const Id record_array_type{buffer.is_storage const Id record_array_type{buffer.is_storage
? TypeRuntimeArray(data_type) ? TypeRuntimeArray(data_type)

7
src/shader_recompiler/frontend/translate/vector_memory.cpp
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@ -168,10 +168,9 @@ void Translator::IMAGE_SAMPLE(const GcnInst& inst) {
return {}; return {};
} }
addr_reg = addr_reg + 4; addr_reg = addr_reg + 4;
return ir.CompositeConstruct(ir.GetVectorReg<IR::F32>(addr_reg - 4), return ir.CompositeConstruct(
ir.GetVectorReg<IR::F32>(addr_reg - 3), ir.GetVectorReg<IR::F32>(addr_reg - 4), ir.GetVectorReg<IR::F32>(addr_reg - 3),
ir.GetVectorReg<IR::F32>(addr_reg - 2), ir.GetVectorReg<IR::F32>(addr_reg - 2), ir.GetVectorReg<IR::F32>(addr_reg - 1));
ir.GetVectorReg<IR::F32>(addr_reg - 1));
}(); }();
// Now we can load body components as noted in Table 8.9 Image Opcodes with Sampler // Now we can load body components as noted in Table 8.9 Image Opcodes with Sampler