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shader_recompiler: redundant IR opcode removed

This commit is contained in:
psucien 2024-05-30 11:50:42 +02:00
parent 9227a2b868
commit 0212e68752
6 changed files with 1 additions and 12 deletions
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4
src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp
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@ -122,10 +122,6 @@ Id EmitFPSqrt(EmitContext& ctx, Id value) {
return ctx.OpSqrt(ctx.F32[1], value); return ctx.OpSqrt(ctx.F32[1], value);
} }
Id EmitFPInvSqrt(EmitContext& ctx, Id value) {
return ctx.OpInverseSqrt(ctx.F32[1], value);
}
Id EmitFPSaturate16(EmitContext& ctx, Id value) { Id EmitFPSaturate16(EmitContext& ctx, Id value) {
const Id zero{ctx.Constant(ctx.F16[1], u16{0})}; const Id zero{ctx.Constant(ctx.F16[1], u16{0})};
const Id one{ctx.Constant(ctx.F16[1], u16{0x3c00})}; const Id one{ctx.Constant(ctx.F16[1], u16{0x3c00})};

1
src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
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@ -174,7 +174,6 @@ Id EmitFPRecip64(EmitContext& ctx, Id value);
Id EmitFPRecipSqrt32(EmitContext& ctx, Id value); Id EmitFPRecipSqrt32(EmitContext& ctx, Id value);
Id EmitFPRecipSqrt64(EmitContext& ctx, Id value); Id EmitFPRecipSqrt64(EmitContext& ctx, Id value);
Id EmitFPSqrt(EmitContext& ctx, Id value); Id EmitFPSqrt(EmitContext& ctx, Id value);
Id EmitFPInvSqrt(EmitContext& ctx, Id value);
Id EmitFPSaturate16(EmitContext& ctx, Id value); Id EmitFPSaturate16(EmitContext& ctx, Id value);
Id EmitFPSaturate32(EmitContext& ctx, Id value); Id EmitFPSaturate32(EmitContext& ctx, Id value);
Id EmitFPSaturate64(EmitContext& ctx, Id value); Id EmitFPSaturate64(EmitContext& ctx, Id value);

2
src/shader_recompiler/frontend/translate/vector_alu.cpp
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@ -195,7 +195,7 @@ void Translator::V_MAX_F32(const GcnInst& inst) {
void Translator::V_RSQ_F32(const GcnInst& inst) { void Translator::V_RSQ_F32(const GcnInst& inst) {
const IR::F32 src0{GetSrc(inst.src[0], true)}; const IR::F32 src0{GetSrc(inst.src[0], true)};
SetDst(inst.dst[0], ir.FPInvSqrt(src0)); SetDst(inst.dst[0], ir.FPRecipSqrt(src0));
} }
} // namespace Shader::Gcn } // namespace Shader::Gcn

4
src/shader_recompiler/ir/ir_emitter.cpp
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@ -609,10 +609,6 @@ F32 IREmitter::FPSqrt(const F32& value) {
return Inst<F32>(Opcode::FPSqrt, value); return Inst<F32>(Opcode::FPSqrt, value);
} }
F32 IREmitter::FPInvSqrt(const F32& value) {
return Inst<F32>(Opcode::FPInvSqrt, value);
}
F32F64 IREmitter::FPSaturate(const F32F64& value) { F32F64 IREmitter::FPSaturate(const F32F64& value) {
switch (value.Type()) { switch (value.Type()) {
case Type::F32: case Type::F32:

1
src/shader_recompiler/ir/ir_emitter.h
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@ -123,7 +123,6 @@ public:
[[nodiscard]] F32F64 FPRecip(const F32F64& value); [[nodiscard]] F32F64 FPRecip(const F32F64& value);
[[nodiscard]] F32F64 FPRecipSqrt(const F32F64& value); [[nodiscard]] F32F64 FPRecipSqrt(const F32F64& value);
[[nodiscard]] F32 FPSqrt(const F32& value); [[nodiscard]] F32 FPSqrt(const F32& value);
[[nodiscard]] F32 FPInvSqrt(const F32& value);
[[nodiscard]] F32F64 FPSaturate(const F32F64& value); [[nodiscard]] F32F64 FPSaturate(const F32F64& value);
[[nodiscard]] F32F64 FPClamp(const F32F64& value, const F32F64& min_value, [[nodiscard]] F32F64 FPClamp(const F32F64& value, const F32F64& min_value,
const F32F64& max_value); const F32F64& max_value);

1
src/shader_recompiler/ir/opcodes.inc
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@ -142,7 +142,6 @@ OPCODE(FPRecip64, F64, F64,
OPCODE(FPRecipSqrt32, F32, F32, ) OPCODE(FPRecipSqrt32, F32, F32, )
OPCODE(FPRecipSqrt64, F64, F64, ) OPCODE(FPRecipSqrt64, F64, F64, )
OPCODE(FPSqrt, F32, F32, ) OPCODE(FPSqrt, F32, F32, )
OPCODE(FPInvSqrt, F32, F32, )
OPCODE(FPSin, F32, F32, ) OPCODE(FPSin, F32, F32, )
OPCODE(FPExp2, F32, F32, ) OPCODE(FPExp2, F32, F32, )
OPCODE(FPCos, F32, F32, ) OPCODE(FPCos, F32, F32, )