From 0212e6875280f62e2cfc5da78fed3d65d8da313a Mon Sep 17 00:00:00 2001 From: psucien Date: Thu, 30 May 2024 11:50:42 +0200 Subject: [PATCH] shader_recompiler: redundant IR opcode removed --- .../backend/spirv/emit_spirv_floating_point.cpp | 4 ---- src/shader_recompiler/backend/spirv/emit_spirv_instructions.h | 1 - src/shader_recompiler/frontend/translate/vector_alu.cpp | 2 +- src/shader_recompiler/ir/ir_emitter.cpp | 4 ---- src/shader_recompiler/ir/ir_emitter.h | 1 - src/shader_recompiler/ir/opcodes.inc | 1 - 6 files changed, 1 insertion(+), 12 deletions(-) diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp index f526aaba..e56eb916 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp +++ b/src/shader_recompiler/backend/spirv/emit_spirv_floating_point.cpp @@ -122,10 +122,6 @@ Id EmitFPSqrt(EmitContext& ctx, Id value) { return ctx.OpSqrt(ctx.F32[1], value); } -Id EmitFPInvSqrt(EmitContext& ctx, Id value) { - return ctx.OpInverseSqrt(ctx.F32[1], value); -} - Id EmitFPSaturate16(EmitContext& ctx, Id value) { const Id zero{ctx.Constant(ctx.F16[1], u16{0})}; const Id one{ctx.Constant(ctx.F16[1], u16{0x3c00})}; diff --git a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h index 8972ff4a..2192b054 100644 --- a/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h +++ b/src/shader_recompiler/backend/spirv/emit_spirv_instructions.h @@ -174,7 +174,6 @@ Id EmitFPRecip64(EmitContext& ctx, Id value); Id EmitFPRecipSqrt32(EmitContext& ctx, Id value); Id EmitFPRecipSqrt64(EmitContext& ctx, Id value); Id EmitFPSqrt(EmitContext& ctx, Id value); -Id EmitFPInvSqrt(EmitContext& ctx, Id value); Id EmitFPSaturate16(EmitContext& ctx, Id value); Id EmitFPSaturate32(EmitContext& ctx, Id value); Id EmitFPSaturate64(EmitContext& ctx, Id value); diff --git a/src/shader_recompiler/frontend/translate/vector_alu.cpp b/src/shader_recompiler/frontend/translate/vector_alu.cpp index bdb69672..44394013 100644 --- a/src/shader_recompiler/frontend/translate/vector_alu.cpp +++ b/src/shader_recompiler/frontend/translate/vector_alu.cpp @@ -195,7 +195,7 @@ void Translator::V_MAX_F32(const GcnInst& inst) { void Translator::V_RSQ_F32(const GcnInst& inst) { const IR::F32 src0{GetSrc(inst.src[0], true)}; - SetDst(inst.dst[0], ir.FPInvSqrt(src0)); + SetDst(inst.dst[0], ir.FPRecipSqrt(src0)); } } // namespace Shader::Gcn diff --git a/src/shader_recompiler/ir/ir_emitter.cpp b/src/shader_recompiler/ir/ir_emitter.cpp index beacc2fe..43e8e439 100644 --- a/src/shader_recompiler/ir/ir_emitter.cpp +++ b/src/shader_recompiler/ir/ir_emitter.cpp @@ -609,10 +609,6 @@ F32 IREmitter::FPSqrt(const F32& value) { return Inst(Opcode::FPSqrt, value); } -F32 IREmitter::FPInvSqrt(const F32& value) { - return Inst(Opcode::FPInvSqrt, value); -} - F32F64 IREmitter::FPSaturate(const F32F64& value) { switch (value.Type()) { case Type::F32: diff --git a/src/shader_recompiler/ir/ir_emitter.h b/src/shader_recompiler/ir/ir_emitter.h index 771e9b13..a52437a9 100644 --- a/src/shader_recompiler/ir/ir_emitter.h +++ b/src/shader_recompiler/ir/ir_emitter.h @@ -123,7 +123,6 @@ public: [[nodiscard]] F32F64 FPRecip(const F32F64& value); [[nodiscard]] F32F64 FPRecipSqrt(const F32F64& value); [[nodiscard]] F32 FPSqrt(const F32& value); - [[nodiscard]] F32 FPInvSqrt(const F32& value); [[nodiscard]] F32F64 FPSaturate(const F32F64& value); [[nodiscard]] F32F64 FPClamp(const F32F64& value, const F32F64& min_value, const F32F64& max_value); diff --git a/src/shader_recompiler/ir/opcodes.inc b/src/shader_recompiler/ir/opcodes.inc index 5a30142f..5fb4dd0f 100644 --- a/src/shader_recompiler/ir/opcodes.inc +++ b/src/shader_recompiler/ir/opcodes.inc @@ -142,7 +142,6 @@ OPCODE(FPRecip64, F64, F64, OPCODE(FPRecipSqrt32, F32, F32, ) OPCODE(FPRecipSqrt64, F64, F64, ) OPCODE(FPSqrt, F32, F32, ) -OPCODE(FPInvSqrt, F32, F32, ) OPCODE(FPSin, F32, F32, ) OPCODE(FPExp2, F32, F32, ) OPCODE(FPCos, F32, F32, )