core: gpu interrupt dispatcher
This commit is contained in:
parent
581688c1ac
commit
923baf0164
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@ -7,6 +7,7 @@
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#include "core/libraries/gnmdriver/gnmdriver.h"
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#include "core/libraries/libs.h"
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#include "core/libraries/videoout/video_out.h"
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#include "core/platform.h"
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#include "video_core/amdgpu/liverpool.h"
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#include "video_core/amdgpu/pm4_cmds.h"
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#include "video_core/renderer_vulkan/renderer_vulkan.h"
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@ -48,8 +49,12 @@ s32 PS4_SYSV_ABI sceGnmAddEqEvent(SceKernelEqueue eq, u64 id, void* udata) {
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kernel_event.event.udata = udata;
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eq->addEvent(kernel_event);
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liverpool->SetEopCallback(
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[=]() { eq->triggerEvent(SceKernelEvent::Type::GfxEop, EVFILT_GRAPHICS_CORE, nullptr); });
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Platform::IrqC::Instance()->Register([=](Platform::InterruptId irq) {
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ASSERT_MSG(irq == Platform::InterruptId::GfxEop,
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"An unexpected IRQ occured"); // We need to conver IRQ# to event id and do proper
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// filtering in trigger function
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eq->triggerEvent(SceKernelEvent::Type::GfxEop, EVFILT_GRAPHICS_CORE, nullptr);
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});
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return ORBIS_OK;
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}
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@ -158,6 +163,8 @@ s32 PS4_SYSV_ABI sceGnmDeleteEqEvent(SceKernelEqueue eq, u64 id) {
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}
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eq->removeEvent(id);
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Platform::IrqC::Instance()->Unregister();
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return ORBIS_OK;
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}
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@ -1356,7 +1363,7 @@ s32 PS4_SYSV_ABI sceGnmSubmitAndFlipCommandBuffers(u32 count, void* dcb_gpu_addr
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u32* dcb_sizes_in_bytes, void* ccb_gpu_addrs[],
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u32* ccb_sizes_in_bytes, u32 vo_handle,
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u32 buf_idx, u32 flip_mode, u32 flip_arg) {
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LOG_INFO(Lib_GnmDriver, "called");
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LOG_INFO(Lib_GnmDriver, "called [buf = {}]", buf_idx);
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auto* cmdbuf = reinterpret_cast<u32*>(dcb_gpu_addrs[count - 1]);
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const auto size_dw = dcb_sizes_in_bytes[count - 1] / 4;
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@ -6,6 +6,7 @@
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#include "core/libraries/error_codes.h"
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#include "core/libraries/kernel/time_management.h"
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#include "core/libraries/videoout/driver.h"
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#include "core/platform.h"
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#include "video_core/renderer_vulkan/renderer_vulkan.h"
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@ -199,16 +200,19 @@ void VideoOutDriver::Flip(std::chrono::microseconds timeout) {
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// Reset flip label
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req.port->buffer_labels[req.index] = 0;
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LOG_INFO(Lib_VideoOut, "Flip done [buf = {}]", req.index);
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}
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bool VideoOutDriver::SubmitFlip(VideoOutPort* port, s32 index, s64 flip_arg) {
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bool VideoOutDriver::SubmitFlip(VideoOutPort* port, s32 index, s64 flip_arg,
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bool is_eop /*= false*/) {
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const auto& buffer = port->buffer_slots[index];
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const auto& group = port->groups[buffer.group_index];
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auto* frame = renderer->PrepareFrame(group, buffer.address_left);
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std::scoped_lock lock{mutex};
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if (requests.size() >= 2) {
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if (requests.size() >= port->NumRegisteredBuffers()) {
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LOG_ERROR(Lib_VideoOut, "Flip queue is full");
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return false;
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}
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@ -218,6 +222,7 @@ bool VideoOutDriver::SubmitFlip(VideoOutPort* port, s32 index, s64 flip_arg) {
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.index = index,
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.flip_arg = flip_arg,
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.submit_tsc = Libraries::Kernel::sceKernelReadTsc(),
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.eop = is_eop,
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});
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port->flip_status.flipPendingNum = static_cast<int>(requests.size());
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@ -34,6 +34,11 @@ struct VideoOutPort {
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}
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return index;
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}
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[[nodiscard]] int NumRegisteredBuffers() const {
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return std::count_if(buffer_slots.cbegin(), buffer_slots.cend(),
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[](auto& buffer) { return buffer.group_index != -1; });
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}
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};
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struct ServiceThreadParams {
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@ -59,7 +64,7 @@ public:
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int UnregisterBuffers(VideoOutPort* port, s32 attributeIndex);
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void Flip(std::chrono::microseconds timeout);
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bool SubmitFlip(VideoOutPort* port, s32 index, s64 flip_arg);
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bool SubmitFlip(VideoOutPort* port, s32 index, s64 flip_arg, bool is_eop = false);
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void Vblank();
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@ -70,6 +75,7 @@ private:
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s32 index;
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s64 flip_arg;
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u64 submit_tsc;
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bool eop;
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};
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std::mutex mutex;
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@ -10,6 +10,7 @@
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#include "core/libraries/videoout/driver.h"
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#include "core/libraries/videoout/video_out.h"
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#include "core/loader/symbols_resolver.h"
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#include "core/platform.h"
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namespace Libraries::VideoOut {
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@ -216,13 +217,17 @@ void sceVideoOutGetBufferLabelAddress(s32 handle, uintptr_t* label_addr) {
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*label_addr = reinterpret_cast<uintptr_t>(port->buffer_labels.data());
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}
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s32 sceVideoOutSubmitEopFlip(s32 handle, u32 buf_id, u32 mode, u32 arg, void* unk) {
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s32 sceVideoOutSubmitEopFlip(s32 handle, u32 buf_id, u32 mode, u32 arg, void** unk) {
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auto* port = driver->GetPort(handle);
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if (!port) {
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return 0x8029000b;
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}
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// TODO
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Platform::IrqC::Instance()->RegisterOnce([=](Platform::InterruptId irq) {
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ASSERT_MSG(irq == Platform::InterruptId::GfxEop, "An unexpected IRQ occured");
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const auto result = driver->SubmitFlip(port, buf_id, arg, true);
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ASSERT_MSG(result, "EOP flip submission failed");
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});
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return ORBIS_OK;
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}
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@ -104,7 +104,7 @@ void Vblank();
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// Internal system functions
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void sceVideoOutGetBufferLabelAddress(s32 handle, uintptr_t* label_addr);
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s32 sceVideoOutSubmitEopFlip(s32 handle, u32 buf_id, u32 mode, u32 arg, void* unk);
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s32 sceVideoOutSubmitEopFlip(s32 handle, u32 buf_id, u32 mode, u32 arg, void** unk);
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void RegisterLib(Core::Loader::SymbolsResolver* sym);
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@ -0,0 +1,78 @@
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// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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#include "common/assert.h"
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#include "common/logging/log.h"
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#include "common/singleton.h"
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#include "common/types.h"
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#include "magic_enum.hpp"
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#include <functional>
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#include <mutex>
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#include <optional>
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#include <queue>
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namespace Platform {
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enum class InterruptId : u32 {
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Compute0RelMem = 0u,
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Compute1RelMem = 1u,
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Compute2RelMem = 2u,
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Compute3RelMem = 3u,
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Compute4RelMem = 4u,
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Compute5RelMem = 5u,
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Compute6RelMem = 6u,
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GfxEop = 0x40u
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};
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using IrqHandler = std::function<void(InterruptId)>;
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struct IrqController {
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void RegisterOnce(IrqHandler handler) {
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std::unique_lock lock{m_lock};
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one_time_subscribers.emplace(handler);
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}
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void Register(IrqHandler handler) {
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ASSERT_MSG(!persistent_handler.has_value(),
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"Too many persistent handlers"); // Add a slot map if so
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{
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std::unique_lock lock{m_lock};
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persistent_handler.emplace(handler);
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}
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}
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void Unregister() {
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std::unique_lock lock{m_lock};
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persistent_handler.reset();
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}
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void Signal(InterruptId irq) {
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LOG_TRACE(Core, "IRQ signaled: {}", magic_enum::enum_name(irq));
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{
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std::unique_lock lock{m_lock};
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if (persistent_handler) {
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persistent_handler.value()(irq);
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}
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while (!one_time_subscribers.empty()) {
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const auto& h = one_time_subscribers.front();
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h(irq);
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one_time_subscribers.pop();
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}
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}
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}
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private:
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std::optional<IrqHandler> persistent_handler{};
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std::queue<IrqHandler> one_time_subscribers{};
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std::mutex m_lock{};
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};
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using IrqC = Common::Singleton<IrqController>;
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} // namespace Platform
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@ -3,6 +3,7 @@
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#include "common/assert.h"
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#include "common/io_file.h"
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#include "common/thread.h"
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#include "video_core/amdgpu/liverpool.h"
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#include "video_core/amdgpu/pm4_cmds.h"
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@ -11,6 +12,8 @@ namespace AmdGpu {
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Liverpool::Liverpool() = default;
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void Liverpool::ProcessCmdList(u32* cmdbuf, u32 size_in_bytes) {
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Common::SetCurrentThreadName("CommandProcessor_Gfx");
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auto* header = reinterpret_cast<PM4Header*>(cmdbuf);
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u32 processed_cmd_size = 0;
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@ -70,54 +73,12 @@ void Liverpool::ProcessCmdList(u32* cmdbuf, u32 size_in_bytes) {
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}
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case PM4ItOpcode::EventWriteEos: {
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const auto* event_eos = reinterpret_cast<PM4CmdEventWriteEos*>(header);
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switch (event_eos->command.Value()) {
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case PM4CmdEventWriteEos::Command::SingalFence: {
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event_eos->SignalFence();
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break;
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}
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default: {
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UNREACHABLE();
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}
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}
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break;
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}
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case PM4ItOpcode::EventWriteEop: {
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const auto* event_eop = reinterpret_cast<PM4CmdEventWriteEop*>(header);
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const InterruptSelect irq_sel = event_eop->int_sel;
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const DataSelect data_sel = event_eop->data_sel;
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// Write back data if required
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switch (data_sel) {
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case DataSelect::Data32Low: {
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*reinterpret_cast<u32*>(event_eop->Address()) = event_eop->DataDWord();
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break;
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}
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case DataSelect::Data64: {
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*event_eop->Address() = event_eop->DataQWord();
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break;
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}
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default: {
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UNREACHABLE();
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}
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}
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switch (irq_sel) {
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case InterruptSelect::None: {
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// No interrupt
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break;
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}
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case InterruptSelect::IrqWhenWriteConfirm: {
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if (eop_callback) {
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eop_callback();
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} else {
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UNREACHABLE_MSG("EOP callback is not registered");
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}
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break;
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}
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default: {
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UNREACHABLE();
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}
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}
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event_eop->SignalFence();
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break;
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}
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case PM4ItOpcode::DmaData: {
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@ -143,11 +104,9 @@ void Liverpool::ProcessCmdList(u32* cmdbuf, u32 size_in_bytes) {
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case PM4ItOpcode::WaitRegMem: {
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const auto* wait_reg_mem = reinterpret_cast<PM4CmdWaitRegMem*>(header);
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ASSERT(wait_reg_mem->engine.Value() == PM4CmdWaitRegMem::Engine::Me);
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ASSERT(wait_reg_mem->function.Value() == PM4CmdWaitRegMem::Function::Equal);
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{
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std::unique_lock lock{m_reg_mem};
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cv_reg_mem.wait(lock, [&]() { return wait_reg_mem->Test(); });
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while (!wait_reg_mem->Test()) {
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using namespace std::chrono_literals;
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std::this_thread::sleep_for(1ms);
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}
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break;
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}
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@ -624,17 +624,11 @@ public:
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// reworked with mutiple queues introduction
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cp.get();
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}
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void SetEopCallback(auto const& cb) {
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eop_callback = cb;
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}
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private:
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void ProcessCmdList(u32* cmdbuf, u32 size_in_bytes);
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std::function<void(void)> eop_callback{};
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std::future<void> cp{};
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std::condition_variable cv_reg_mem{};
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std::mutex m_reg_mem{};
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};
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static_assert(GFX6_3D_REG_INDEX(ps_program) == 0x2C08);
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@ -6,6 +6,7 @@
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#include <cstring>
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#include "common/bit_field.h"
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#include "common/types.h"
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#include "core/platform.h"
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#include "video_core/amdgpu/pm4_opcodes.h"
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namespace AmdGpu {
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@ -282,8 +283,9 @@ struct PM4CmdEventWriteEop {
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u32 data_lo; ///< Value that will be written to memory when event occurs
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u32 data_hi; ///< Value that will be written to memory when event occurs
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u64* Address() const {
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return reinterpret_cast<u64*>(address_lo | u64(address_hi) << 32);
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template <typename T>
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T* Address() const {
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return reinterpret_cast<T*>(address_lo | u64(address_hi) << 32);
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}
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u32 DataDWord() const {
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@ -293,6 +295,36 @@ struct PM4CmdEventWriteEop {
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u64 DataQWord() const {
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return data_lo | u64(data_hi) << 32;
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}
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void SignalFence() const {
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switch (data_sel.Value()) {
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case DataSelect::Data32Low: {
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*Address<u32>() = DataDWord();
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break;
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}
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case DataSelect::Data64: {
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*Address<u64>() = DataQWord();
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break;
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}
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default: {
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UNREACHABLE();
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}
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}
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switch (int_sel.Value()) {
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case InterruptSelect::None: {
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// No interrupt
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break;
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}
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case InterruptSelect::IrqWhenWriteConfirm: {
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Platform::IrqC::Instance()->Signal(Platform::InterruptId::GfxEop);
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break;
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}
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default: {
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UNREACHABLE();
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}
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}
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}
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};
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struct PM4DmaData {
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}
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void SignalFence() const {
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ASSERT_MSG(command.Value() == Command::SingalFence, "Invalid action on packet");
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switch (command.Value()) {
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case Command::SingalFence: {
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*Address() = DataDWord();
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break;
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}
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default: {
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UNREACHABLE();
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}
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}
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}
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};
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