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Render.Recompiler: Implement V_FFBH_U32

This commit is contained in:
Frodo Baggins 2024-08-30 10:00:12 -07:00
parent 93ab48432e
commit 70d6b72377
2 changed files with 13 additions and 0 deletions
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1
src/shader_recompiler/frontend/translate/translate.h
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@ -190,6 +190,7 @@ public:
void V_FFBL_B32(const GcnInst& inst);
void V_MBCNT_U32_B32(bool is_low, const GcnInst& inst);
void V_BFM_B32(const GcnInst& inst);
void V_FFBH_U32(const GcnInst& inst);
// Vector Memory
void BUFFER_LOAD(u32 num_dwords, bool is_typed, const GcnInst& inst);

12
src/shader_recompiler/frontend/translate/vector_alu.cpp
View File

@ -314,6 +314,8 @@ void Translator::EmitVectorAlu(const GcnInst& inst) {
case Opcode::V_BFM_B32:
return V_BFM_B32(inst);
case Opcode::V_FFBH_U32:
return V_FFBH_U32(inst);
default:
LogMissingOpcode(inst);
}
@ -976,4 +978,14 @@ void Translator::V_BFM_B32(const GcnInst& inst) {
SetDst(inst.dst[0], ir.ShiftLeftLogical(ones, src1));
}
void Translator::V_FFBH_U32(const GcnInst& inst) {
const IR::U32 src0{GetSrc(inst.src[0])};
// Gcn wants the MSB position counting from the left, but SPIR-V counts from the rightmost (LSB) position
const IR::U32 msb_pos = ir.FindUMsb(src0);
const IR::U32 pos_from_left = ir.ISub(ir.Imm32(31), msb_pos);
// Select 0xFFFFFFFF if src0 was 0
const IR::U1 cond = ir.INotEqual(src0, ir.Imm32(0));
SetDst(inst.dst[0], IR::U32{ir.Select(cond, pos_from_left, ir.Imm32(~0U))});
}
} // namespace Shader::Gcn