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Author | SHA1 | Date |
---|---|---|
IndecisiveTurtle | 0dc05cfff2 | |
IndecisiveTurtle | 3789dbe8e5 | |
IndecisiveTurtle | 68c465813c |
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@ -143,6 +143,7 @@ int PS4_SYSV_ABI sceKernelGettimeofday(OrbisKernelTimeval* tp) {
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return ORBIS_KERNEL_ERROR_EFAULT;
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return ORBIS_KERNEL_ERROR_EFAULT;
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}
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}
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#ifdef _WIN64
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auto now = std::chrono::system_clock::now();
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auto now = std::chrono::system_clock::now();
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auto duration = now.time_since_epoch();
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auto duration = now.time_since_epoch();
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auto seconds = std::chrono::duration_cast<std::chrono::seconds>(duration);
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auto seconds = std::chrono::duration_cast<std::chrono::seconds>(duration);
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@ -150,6 +151,12 @@ int PS4_SYSV_ABI sceKernelGettimeofday(OrbisKernelTimeval* tp) {
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tp->tv_sec = seconds.count();
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tp->tv_sec = seconds.count();
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tp->tv_usec = microsecs.count();
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tp->tv_usec = microsecs.count();
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#else
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timeval tv;
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gettimeofday(&tv, nullptr);
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tp->tv_sec = tv.tv_sec;
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tp->tv_usec = tv.tv_usec;
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#endif
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return ORBIS_OK;
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return ORBIS_OK;
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}
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}
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@ -37,6 +37,7 @@ static IR::Condition MakeCondition(Opcode opcode) {
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return IR::Condition::Execnz;
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return IR::Condition::Execnz;
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case Opcode::S_AND_SAVEEXEC_B64:
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case Opcode::S_AND_SAVEEXEC_B64:
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case Opcode::S_ANDN2_B64:
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case Opcode::S_ANDN2_B64:
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case Opcode::V_CMPX_NE_U32:
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return IR::Condition::Execnz;
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return IR::Condition::Execnz;
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default:
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default:
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return IR::Condition::True;
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return IR::Condition::True;
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@ -93,7 +94,7 @@ void CFG::EmitDivergenceLabels() {
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// While this instruction does not save EXEC it is often used paired
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// While this instruction does not save EXEC it is often used paired
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// with SAVEEXEC to mask the threads that didn't pass the condition
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// with SAVEEXEC to mask the threads that didn't pass the condition
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// of initial branch.
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// of initial branch.
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inst.opcode == Opcode::S_ANDN2_B64;
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inst.opcode == Opcode::S_ANDN2_B64 || inst.opcode == Opcode::V_CMPX_NE_U32;
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};
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};
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const auto is_close_scope = [](const GcnInst& inst) {
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const auto is_close_scope = [](const GcnInst& inst) {
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// Closing an EXEC scope can be either a branch instruction
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// Closing an EXEC scope can be either a branch instruction
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@ -187,7 +188,7 @@ void CFG::LinkBlocks() {
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const auto end_inst{block.end_inst};
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const auto end_inst{block.end_inst};
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// Handle divergence block inserted here.
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// Handle divergence block inserted here.
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if (end_inst.opcode == Opcode::S_AND_SAVEEXEC_B64 ||
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if (end_inst.opcode == Opcode::S_AND_SAVEEXEC_B64 ||
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end_inst.opcode == Opcode::S_ANDN2_B64) {
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end_inst.opcode == Opcode::S_ANDN2_B64 || end_inst.opcode == Opcode::V_CMPX_NE_U32) {
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// Blocks are stored ordered by address in the set
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// Blocks are stored ordered by address in the set
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auto next_it = std::next(it);
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auto next_it = std::next(it);
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auto* target_block = &(*next_it);
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auto* target_block = &(*next_it);
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@ -12,18 +12,19 @@
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namespace Vulkan {
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namespace Vulkan {
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ComputePipeline::ComputePipeline(const Instance& instance_, Scheduler& scheduler_,
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ComputePipeline::ComputePipeline(const Instance& instance_, Scheduler& scheduler_,
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vk::PipelineCache pipeline_cache, const Shader::Info* info_,
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vk::PipelineCache pipeline_cache, u64 compute_key_,
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u64 compute_key_, vk::ShaderModule module)
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const Program* program)
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: instance{instance_}, scheduler{scheduler_}, compute_key{compute_key_}, info{*info_} {
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: instance{instance_}, scheduler{scheduler_}, compute_key{compute_key_},
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info{&program->pgm.info} {
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const vk::PipelineShaderStageCreateInfo shader_ci = {
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const vk::PipelineShaderStageCreateInfo shader_ci = {
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.stage = vk::ShaderStageFlagBits::eCompute,
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.stage = vk::ShaderStageFlagBits::eCompute,
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.module = module,
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.module = program->module,
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.pName = "main",
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.pName = "main",
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};
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};
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u32 binding{};
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u32 binding{};
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boost::container::small_vector<vk::DescriptorSetLayoutBinding, 32> bindings;
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boost::container::small_vector<vk::DescriptorSetLayoutBinding, 32> bindings;
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for (const auto& buffer : info.buffers) {
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for (const auto& buffer : info->buffers) {
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bindings.push_back({
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bindings.push_back({
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.binding = binding++,
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.binding = binding++,
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.descriptorType = buffer.is_storage ? vk::DescriptorType::eStorageBuffer
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.descriptorType = buffer.is_storage ? vk::DescriptorType::eStorageBuffer
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@ -32,7 +33,7 @@ ComputePipeline::ComputePipeline(const Instance& instance_, Scheduler& scheduler
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.stageFlags = vk::ShaderStageFlagBits::eCompute,
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.stageFlags = vk::ShaderStageFlagBits::eCompute,
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});
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});
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}
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}
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for (const auto& image : info.images) {
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for (const auto& image : info->images) {
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bindings.push_back({
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bindings.push_back({
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.binding = binding++,
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.binding = binding++,
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.descriptorType = image.is_storage ? vk::DescriptorType::eStorageImage
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.descriptorType = image.is_storage ? vk::DescriptorType::eStorageImage
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@ -41,7 +42,7 @@ ComputePipeline::ComputePipeline(const Instance& instance_, Scheduler& scheduler
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.stageFlags = vk::ShaderStageFlagBits::eCompute,
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.stageFlags = vk::ShaderStageFlagBits::eCompute,
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});
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});
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}
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}
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for (const auto& sampler : info.samplers) {
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for (const auto& sampler : info->samplers) {
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bindings.push_back({
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bindings.push_back({
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.binding = binding++,
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.binding = binding++,
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.descriptorType = vk::DescriptorType::eSampler,
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.descriptorType = vk::DescriptorType::eSampler,
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@ -96,8 +97,8 @@ bool ComputePipeline::BindResources(VideoCore::BufferCache& buffer_cache,
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Shader::PushData push_data{};
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Shader::PushData push_data{};
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u32 binding{};
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u32 binding{};
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for (const auto& buffer : info.buffers) {
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for (const auto& buffer : info->buffers) {
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const auto vsharp = buffer.GetVsharp(info);
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const auto vsharp = buffer.GetVsharp(*info);
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const VAddr address = vsharp.base_address;
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const VAddr address = vsharp.base_address;
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// Most of the time when a metadata is updated with a shader it gets cleared. It means we
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// Most of the time when a metadata is updated with a shader it gets cleared. It means we
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// can skip the whole dispatch and update the tracked state instead. Also, it is not
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// can skip the whole dispatch and update the tracked state instead. Also, it is not
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@ -139,9 +140,9 @@ bool ComputePipeline::BindResources(VideoCore::BufferCache& buffer_cache,
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});
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});
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}
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}
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for (const auto& image_desc : info.images) {
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for (const auto& image_desc : info->images) {
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const auto tsharp =
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const auto tsharp =
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info.ReadUd<AmdGpu::Image>(image_desc.sgpr_base, image_desc.dword_offset);
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info->ReadUd<AmdGpu::Image>(image_desc.sgpr_base, image_desc.dword_offset);
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VideoCore::ImageInfo image_info{tsharp};
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VideoCore::ImageInfo image_info{tsharp};
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VideoCore::ImageViewInfo view_info{tsharp, image_desc.is_storage};
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VideoCore::ImageViewInfo view_info{tsharp, image_desc.is_storage};
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const auto& image_view = texture_cache.FindTexture(image_info, view_info);
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const auto& image_view = texture_cache.FindTexture(image_info, view_info);
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@ -161,8 +162,8 @@ bool ComputePipeline::BindResources(VideoCore::BufferCache& buffer_cache,
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LOG_WARNING(Render_Vulkan, "Unexpected metadata read by a CS shader (texture)");
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LOG_WARNING(Render_Vulkan, "Unexpected metadata read by a CS shader (texture)");
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}
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}
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}
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}
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for (const auto& sampler : info.samplers) {
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for (const auto& sampler : info->samplers) {
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const auto ssharp = sampler.GetSsharp(info);
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const auto ssharp = sampler.GetSsharp(*info);
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const auto vk_sampler = texture_cache.GetSampler(ssharp);
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const auto vk_sampler = texture_cache.GetSampler(ssharp);
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image_infos.emplace_back(vk_sampler, VK_NULL_HANDLE, vk::ImageLayout::eGeneral);
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image_infos.emplace_back(vk_sampler, VK_NULL_HANDLE, vk::ImageLayout::eGeneral);
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set_writes.push_back({
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set_writes.push_back({
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@ -3,6 +3,7 @@
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#pragma once
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#pragma once
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#include "shader_recompiler/ir/program.h"
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#include "shader_recompiler/runtime_info.h"
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#include "shader_recompiler/runtime_info.h"
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#include "video_core/renderer_vulkan/vk_common.h"
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#include "video_core/renderer_vulkan/vk_common.h"
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@ -16,11 +17,18 @@ namespace Vulkan {
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class Instance;
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class Instance;
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class Scheduler;
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class Scheduler;
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struct Program {
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Shader::IR::Program pgm;
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std::vector<u32> spv;
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vk::ShaderModule module;
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u32 end_binding;
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};
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class ComputePipeline {
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class ComputePipeline {
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public:
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public:
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explicit ComputePipeline(const Instance& instance, Scheduler& scheduler,
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explicit ComputePipeline(const Instance& instance, Scheduler& scheduler,
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vk::PipelineCache pipeline_cache, const Shader::Info* info,
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vk::PipelineCache pipeline_cache, u64 compute_key,
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u64 compute_key, vk::ShaderModule module);
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const Program* program);
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~ComputePipeline();
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~ComputePipeline();
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[[nodiscard]] vk::Pipeline Handle() const noexcept {
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[[nodiscard]] vk::Pipeline Handle() const noexcept {
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@ -37,7 +45,7 @@ private:
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vk::UniquePipelineLayout pipeline_layout;
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vk::UniquePipelineLayout pipeline_layout;
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vk::UniqueDescriptorSetLayout desc_layout;
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vk::UniqueDescriptorSetLayout desc_layout;
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u64 compute_key;
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u64 compute_key;
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Shader::Info info{};
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const Shader::Info* info;
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};
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};
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} // namespace Vulkan
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} // namespace Vulkan
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@ -19,15 +19,14 @@ namespace Vulkan {
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GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& scheduler_,
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GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& scheduler_,
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const GraphicsPipelineKey& key_,
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const GraphicsPipelineKey& key_,
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vk::PipelineCache pipeline_cache,
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vk::PipelineCache pipeline_cache,
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std::span<const Shader::Info*, MaxShaderStages> infos,
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std::span<const Program*, MaxShaderStages> programs)
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std::array<vk::ShaderModule, MaxShaderStages> modules)
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: instance{instance_}, scheduler{scheduler_}, key{key_} {
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: instance{instance_}, scheduler{scheduler_}, key{key_} {
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const vk::Device device = instance.GetDevice();
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const vk::Device device = instance.GetDevice();
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for (u32 i = 0; i < MaxShaderStages; i++) {
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for (u32 i = 0; i < MaxShaderStages; i++) {
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if (!infos[i]) {
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if (!programs[i]) {
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continue;
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continue;
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}
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}
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stages[i] = *infos[i];
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stages[i] = &programs[i]->pgm.info;
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}
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}
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BuildDescSetLayout();
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BuildDescSetLayout();
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@ -49,14 +48,14 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
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boost::container::static_vector<vk::VertexInputBindingDescription, 32> bindings;
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boost::container::static_vector<vk::VertexInputBindingDescription, 32> bindings;
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boost::container::static_vector<vk::VertexInputAttributeDescription, 32> attributes;
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boost::container::static_vector<vk::VertexInputAttributeDescription, 32> attributes;
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const auto& vs_info = stages[u32(Shader::Stage::Vertex)];
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const auto& vs_info = stages[u32(Shader::Stage::Vertex)];
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for (const auto& input : vs_info.vs_inputs) {
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for (const auto& input : vs_info->vs_inputs) {
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if (input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate0 ||
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if (input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate0 ||
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input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate1) {
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input.instance_step_rate == Shader::Info::VsInput::InstanceIdType::OverStepRate1) {
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// Skip attribute binding as the data will be pulled by shader
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// Skip attribute binding as the data will be pulled by shader
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continue;
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continue;
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}
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}
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const auto buffer = vs_info.ReadUd<AmdGpu::Buffer>(input.sgpr_base, input.dword_offset);
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const auto buffer = vs_info->ReadUd<AmdGpu::Buffer>(input.sgpr_base, input.dword_offset);
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attributes.push_back({
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attributes.push_back({
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.location = input.binding,
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.location = input.binding,
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.binding = input.binding,
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.binding = input.binding,
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@ -184,21 +183,21 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
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.maxDepthBounds = key.depth_bounds_max,
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.maxDepthBounds = key.depth_bounds_max,
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};
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};
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u32 shader_count{};
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auto stage = u32(Shader::Stage::Vertex);
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auto stage = u32(Shader::Stage::Vertex);
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std::array<vk::PipelineShaderStageCreateInfo, MaxShaderStages> shader_stages;
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boost::container::static_vector<vk::PipelineShaderStageCreateInfo, MaxShaderStages>
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shader_stages[shader_count++] = vk::PipelineShaderStageCreateInfo{
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shader_stages;
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shader_stages.emplace_back(vk::PipelineShaderStageCreateInfo{
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.stage = vk::ShaderStageFlagBits::eVertex,
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.stage = vk::ShaderStageFlagBits::eVertex,
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.module = modules[stage],
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.module = programs[stage]->module,
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.pName = "main",
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.pName = "main",
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};
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});
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stage = u32(Shader::Stage::Fragment);
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stage = u32(Shader::Stage::Fragment);
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if (modules[stage]) {
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if (programs[stage]) {
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shader_stages[shader_count++] = vk::PipelineShaderStageCreateInfo{
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shader_stages.emplace_back(vk::PipelineShaderStageCreateInfo{
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.stage = vk::ShaderStageFlagBits::eFragment,
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.stage = vk::ShaderStageFlagBits::eFragment,
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.module = modules[stage],
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.module = programs[stage]->module,
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.pName = "main",
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.pName = "main",
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};
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});
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}
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}
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const auto it = std::ranges::find(key.color_formats, vk::Format::eUndefined);
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const auto it = std::ranges::find(key.color_formats, vk::Format::eUndefined);
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@ -271,7 +270,7 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
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const vk::GraphicsPipelineCreateInfo pipeline_info = {
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const vk::GraphicsPipelineCreateInfo pipeline_info = {
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.pNext = &pipeline_rendering_ci,
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.pNext = &pipeline_rendering_ci,
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.stageCount = shader_count,
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.stageCount = static_cast<u32>(shader_stages.size()),
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.pStages = shader_stages.data(),
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.pStages = shader_stages.data(),
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.pVertexInputState = &vertex_input_info,
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.pVertexInputState = &vertex_input_info,
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.pInputAssemblyState = &input_assembly,
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.pInputAssemblyState = &input_assembly,
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@ -297,8 +296,11 @@ GraphicsPipeline::~GraphicsPipeline() = default;
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void GraphicsPipeline::BuildDescSetLayout() {
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void GraphicsPipeline::BuildDescSetLayout() {
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u32 binding{};
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u32 binding{};
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boost::container::small_vector<vk::DescriptorSetLayoutBinding, 32> bindings;
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boost::container::small_vector<vk::DescriptorSetLayoutBinding, 32> bindings;
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for (const auto& stage : stages) {
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for (const auto* stage : stages) {
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for (const auto& buffer : stage.buffers) {
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if (!stage) {
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continue;
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}
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for (const auto& buffer : stage->buffers) {
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bindings.push_back({
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bindings.push_back({
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.binding = binding++,
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.binding = binding++,
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.descriptorType = buffer.is_storage ? vk::DescriptorType::eStorageBuffer
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.descriptorType = buffer.is_storage ? vk::DescriptorType::eStorageBuffer
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@ -307,7 +309,7 @@ void GraphicsPipeline::BuildDescSetLayout() {
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.stageFlags = vk::ShaderStageFlagBits::eVertex | vk::ShaderStageFlagBits::eFragment,
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.stageFlags = vk::ShaderStageFlagBits::eVertex | vk::ShaderStageFlagBits::eFragment,
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});
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});
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}
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}
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for (const auto& image : stage.images) {
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for (const auto& image : stage->images) {
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bindings.push_back({
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bindings.push_back({
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.binding = binding++,
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.binding = binding++,
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.descriptorType = image.is_storage ? vk::DescriptorType::eStorageImage
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.descriptorType = image.is_storage ? vk::DescriptorType::eStorageImage
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@ -316,7 +318,7 @@ void GraphicsPipeline::BuildDescSetLayout() {
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.stageFlags = vk::ShaderStageFlagBits::eVertex | vk::ShaderStageFlagBits::eFragment,
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.stageFlags = vk::ShaderStageFlagBits::eVertex | vk::ShaderStageFlagBits::eFragment,
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});
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});
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||||||
}
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}
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for (const auto& sampler : stage.samplers) {
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for (const auto& sampler : stage->samplers) {
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bindings.push_back({
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bindings.push_back({
|
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.binding = binding++,
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.binding = binding++,
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.descriptorType = vk::DescriptorType::eSampler,
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.descriptorType = vk::DescriptorType::eSampler,
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@ -343,13 +345,16 @@ void GraphicsPipeline::BindResources(const Liverpool::Regs& regs,
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||||||
Shader::PushData push_data{};
|
Shader::PushData push_data{};
|
||||||
u32 binding{};
|
u32 binding{};
|
||||||
|
|
||||||
for (const auto& stage : stages) {
|
for (const auto* stage : stages) {
|
||||||
if (stage.uses_step_rates) {
|
if (!stage) {
|
||||||
|
continue;
|
||||||
|
}
|
||||||
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if (stage->uses_step_rates) {
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push_data.step0 = regs.vgt_instance_step_rate_0;
|
push_data.step0 = regs.vgt_instance_step_rate_0;
|
||||||
push_data.step1 = regs.vgt_instance_step_rate_1;
|
push_data.step1 = regs.vgt_instance_step_rate_1;
|
||||||
}
|
}
|
||||||
for (const auto& buffer : stage.buffers) {
|
for (const auto& buffer : stage->buffers) {
|
||||||
const auto vsharp = buffer.GetVsharp(stage);
|
const auto vsharp = buffer.GetVsharp(*stage);
|
||||||
if (vsharp) {
|
if (vsharp) {
|
||||||
const VAddr address = vsharp.base_address;
|
const VAddr address = vsharp.base_address;
|
||||||
if (texture_cache.IsMeta(address)) {
|
if (texture_cache.IsMeta(address)) {
|
||||||
|
@ -382,9 +387,9 @@ void GraphicsPipeline::BindResources(const Liverpool::Regs& regs,
|
||||||
}
|
}
|
||||||
|
|
||||||
boost::container::static_vector<AmdGpu::Image, 16> tsharps;
|
boost::container::static_vector<AmdGpu::Image, 16> tsharps;
|
||||||
for (const auto& image_desc : stage.images) {
|
for (const auto& image_desc : stage->images) {
|
||||||
const auto& tsharp = tsharps.emplace_back(
|
const auto& tsharp = tsharps.emplace_back(
|
||||||
stage.ReadUd<AmdGpu::Image>(image_desc.sgpr_base, image_desc.dword_offset));
|
stage->ReadUd<AmdGpu::Image>(image_desc.sgpr_base, image_desc.dword_offset));
|
||||||
VideoCore::ImageInfo image_info{tsharp};
|
VideoCore::ImageInfo image_info{tsharp};
|
||||||
VideoCore::ImageViewInfo view_info{tsharp, image_desc.is_storage};
|
VideoCore::ImageViewInfo view_info{tsharp, image_desc.is_storage};
|
||||||
const auto& image_view = texture_cache.FindTexture(image_info, view_info);
|
const auto& image_view = texture_cache.FindTexture(image_info, view_info);
|
||||||
|
@ -404,8 +409,8 @@ void GraphicsPipeline::BindResources(const Liverpool::Regs& regs,
|
||||||
LOG_WARNING(Render_Vulkan, "Unexpected metadata read by a PS shader (texture)");
|
LOG_WARNING(Render_Vulkan, "Unexpected metadata read by a PS shader (texture)");
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
for (const auto& sampler : stage.samplers) {
|
for (const auto& sampler : stage->samplers) {
|
||||||
auto ssharp = sampler.GetSsharp(stage);
|
auto ssharp = sampler.GetSsharp(*stage);
|
||||||
if (sampler.disable_aniso) {
|
if (sampler.disable_aniso) {
|
||||||
const auto& tsharp = tsharps[sampler.associated_image];
|
const auto& tsharp = tsharps[sampler.associated_image];
|
||||||
if (tsharp.base_level == 0 && tsharp.last_level == 0) {
|
if (tsharp.base_level == 0 && tsharp.last_level == 0) {
|
||||||
|
|
|
@ -3,9 +3,9 @@
|
||||||
|
|
||||||
#include <xxhash.h>
|
#include <xxhash.h>
|
||||||
#include "common/types.h"
|
#include "common/types.h"
|
||||||
#include "shader_recompiler/runtime_info.h"
|
|
||||||
#include "video_core/renderer_vulkan/liverpool_to_vk.h"
|
#include "video_core/renderer_vulkan/liverpool_to_vk.h"
|
||||||
#include "video_core/renderer_vulkan/vk_common.h"
|
#include "video_core/renderer_vulkan/vk_common.h"
|
||||||
|
#include "video_core/renderer_vulkan/vk_compute_pipeline.h"
|
||||||
|
|
||||||
namespace VideoCore {
|
namespace VideoCore {
|
||||||
class BufferCache;
|
class BufferCache;
|
||||||
|
@ -58,8 +58,7 @@ class GraphicsPipeline {
|
||||||
public:
|
public:
|
||||||
explicit GraphicsPipeline(const Instance& instance, Scheduler& scheduler,
|
explicit GraphicsPipeline(const Instance& instance, Scheduler& scheduler,
|
||||||
const GraphicsPipelineKey& key, vk::PipelineCache pipeline_cache,
|
const GraphicsPipelineKey& key, vk::PipelineCache pipeline_cache,
|
||||||
std::span<const Shader::Info*, MaxShaderStages> infos,
|
std::span<const Program*, MaxShaderStages> programs);
|
||||||
std::array<vk::ShaderModule, MaxShaderStages> modules);
|
|
||||||
~GraphicsPipeline();
|
~GraphicsPipeline();
|
||||||
|
|
||||||
void BindResources(const Liverpool::Regs& regs, VideoCore::BufferCache& buffer_cache,
|
void BindResources(const Liverpool::Regs& regs, VideoCore::BufferCache& buffer_cache,
|
||||||
|
@ -74,7 +73,7 @@ public:
|
||||||
}
|
}
|
||||||
|
|
||||||
const Shader::Info& GetStage(Shader::Stage stage) const noexcept {
|
const Shader::Info& GetStage(Shader::Stage stage) const noexcept {
|
||||||
return stages[u32(stage)];
|
return *stages[u32(stage)];
|
||||||
}
|
}
|
||||||
|
|
||||||
bool IsEmbeddedVs() const noexcept {
|
bool IsEmbeddedVs() const noexcept {
|
||||||
|
@ -99,7 +98,7 @@ private:
|
||||||
vk::UniquePipeline pipeline;
|
vk::UniquePipeline pipeline;
|
||||||
vk::UniquePipelineLayout pipeline_layout;
|
vk::UniquePipelineLayout pipeline_layout;
|
||||||
vk::UniqueDescriptorSetLayout desc_layout;
|
vk::UniqueDescriptorSetLayout desc_layout;
|
||||||
std::array<Shader::Info, MaxShaderStages> stages{};
|
std::array<const Shader::Info*, MaxShaderStages> stages{};
|
||||||
GraphicsPipelineKey key;
|
GraphicsPipelineKey key;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -20,6 +20,10 @@ namespace Vulkan {
|
||||||
|
|
||||||
using Shader::VsOutput;
|
using Shader::VsOutput;
|
||||||
|
|
||||||
|
[[nodiscard]] inline u64 HashCombine(const u64 seed, const u64 hash) {
|
||||||
|
return seed ^ (hash + 0x9e3779b9 + (seed << 6) + (seed >> 2));
|
||||||
|
}
|
||||||
|
|
||||||
void BuildVsOutputs(Shader::Info& info, const AmdGpu::Liverpool::VsOutputControl& ctl) {
|
void BuildVsOutputs(Shader::Info& info, const AmdGpu::Liverpool::VsOutputControl& ctl) {
|
||||||
const auto add_output = [&](VsOutput x, VsOutput y, VsOutput z, VsOutput w) {
|
const auto add_output = [&](VsOutput x, VsOutput y, VsOutput z, VsOutput w) {
|
||||||
if (x != VsOutput::None || y != VsOutput::None || z != VsOutput::None ||
|
if (x != VsOutput::None || y != VsOutput::None || z != VsOutput::None ||
|
||||||
|
@ -246,23 +250,14 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline() {
|
||||||
}
|
}
|
||||||
|
|
||||||
u32 binding{};
|
u32 binding{};
|
||||||
std::array<Shader::IR::Program, MaxShaderStages> programs;
|
|
||||||
std::array<const Shader::Info*, MaxShaderStages> infos{};
|
|
||||||
|
|
||||||
for (u32 i = 0; i < MaxShaderStages; i++) {
|
for (u32 i = 0; i < MaxShaderStages; i++) {
|
||||||
if (!graphics_key.stage_hashes[i]) {
|
if (!graphics_key.stage_hashes[i]) {
|
||||||
stages[i] = VK_NULL_HANDLE;
|
programs[i] = nullptr;
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
auto* pgm = regs.ProgramForStage(i);
|
auto* pgm = regs.ProgramForStage(i);
|
||||||
const auto code = pgm->Code();
|
const auto code = pgm->Code();
|
||||||
|
|
||||||
const auto it = module_map.find(graphics_key.stage_hashes[i]);
|
|
||||||
if (it != module_map.end()) {
|
|
||||||
stages[i] = *it->second;
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
|
|
||||||
// Dump shader code if requested.
|
// Dump shader code if requested.
|
||||||
const auto stage = Shader::Stage{i};
|
const auto stage = Shader::Stage{i};
|
||||||
const u64 hash = graphics_key.stage_hashes[i];
|
const u64 hash = graphics_key.stage_hashes[i];
|
||||||
|
@ -273,39 +268,56 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline() {
|
||||||
block_pool.ReleaseContents();
|
block_pool.ReleaseContents();
|
||||||
inst_pool.ReleaseContents();
|
inst_pool.ReleaseContents();
|
||||||
|
|
||||||
if (stage != Shader::Stage::Compute && stage != Shader::Stage::Fragment &&
|
if (stage != Shader::Stage::Fragment && stage != Shader::Stage::Vertex) {
|
||||||
stage != Shader::Stage::Vertex) {
|
|
||||||
LOG_ERROR(Render_Vulkan, "Unsupported shader stage {}. PL creation skipped.", stage);
|
LOG_ERROR(Render_Vulkan, "Unsupported shader stage {}. PL creation skipped.", stage);
|
||||||
return {};
|
return {};
|
||||||
}
|
}
|
||||||
|
|
||||||
|
const u64 lookup_hash = HashCombine(hash, binding);
|
||||||
|
auto it = program_cache.find(lookup_hash);
|
||||||
|
if (it != program_cache.end()) {
|
||||||
|
const Program* program = it.value().get();
|
||||||
|
ASSERT(program->pgm.info.stage == stage);
|
||||||
|
programs[i] = program;
|
||||||
|
binding = program->end_binding;
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
// Recompile shader to IR.
|
// Recompile shader to IR.
|
||||||
try {
|
try {
|
||||||
|
auto program = std::make_unique<Program>();
|
||||||
|
block_pool.ReleaseContents();
|
||||||
|
inst_pool.ReleaseContents();
|
||||||
|
|
||||||
LOG_INFO(Render_Vulkan, "Compiling {} shader {:#x}", stage, hash);
|
LOG_INFO(Render_Vulkan, "Compiling {} shader {:#x}", stage, hash);
|
||||||
Shader::Info info = MakeShaderInfo(stage, pgm->user_data, regs);
|
Shader::Info info = MakeShaderInfo(stage, pgm->user_data, regs);
|
||||||
info.pgm_base = pgm->Address<uintptr_t>();
|
info.pgm_base = pgm->Address<uintptr_t>();
|
||||||
info.pgm_hash = hash;
|
info.pgm_hash = hash;
|
||||||
programs[i] =
|
program->pgm =
|
||||||
Shader::TranslateProgram(inst_pool, block_pool, code, std::move(info), profile);
|
Shader::TranslateProgram(inst_pool, block_pool, code, std::move(info), profile);
|
||||||
|
|
||||||
// Compile IR to SPIR-V
|
// Compile IR to SPIR-V
|
||||||
auto spv_code = Shader::Backend::SPIRV::EmitSPIRV(profile, programs[i], binding);
|
program->spv = Shader::Backend::SPIRV::EmitSPIRV(profile, program->pgm, binding);
|
||||||
if (Config::dumpShaders()) {
|
if (Config::dumpShaders()) {
|
||||||
DumpShader(spv_code, hash, stage, "spv");
|
DumpShader(program->spv, hash, stage, "spv");
|
||||||
}
|
}
|
||||||
stages[i] = CompileSPV(spv_code, instance.GetDevice());
|
|
||||||
infos[i] = &programs[i].info;
|
// Compile module and set name to hash in renderdoc
|
||||||
|
program->end_binding = binding;
|
||||||
|
program->module = CompileSPV(program->spv, instance.GetDevice());
|
||||||
|
const auto name = fmt::format("{}_{:#x}", stage, hash);
|
||||||
|
Vulkan::SetObjectName(instance.GetDevice(), program->module, name);
|
||||||
|
|
||||||
|
// Cache program
|
||||||
|
const auto [it, _] = program_cache.emplace(lookup_hash, std::move(program));
|
||||||
|
programs[i] = it.value().get();
|
||||||
} catch (const Shader::Exception& e) {
|
} catch (const Shader::Exception& e) {
|
||||||
UNREACHABLE_MSG("{}", e.what());
|
UNREACHABLE_MSG("{}", e.what());
|
||||||
}
|
}
|
||||||
|
|
||||||
// Set module name to hash in renderdoc
|
|
||||||
const auto name = fmt::format("{}_{:#x}", stage, hash);
|
|
||||||
Vulkan::SetObjectName(instance.GetDevice(), stages[i], name);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return std::make_unique<GraphicsPipeline>(instance, scheduler, graphics_key, *pipeline_cache,
|
return std::make_unique<GraphicsPipeline>(instance, scheduler, graphics_key, *pipeline_cache,
|
||||||
infos, stages);
|
programs);
|
||||||
}
|
}
|
||||||
|
|
||||||
std::unique_ptr<ComputePipeline> PipelineCache::CreateComputePipeline() {
|
std::unique_ptr<ComputePipeline> PipelineCache::CreateComputePipeline() {
|
||||||
|
@ -322,26 +334,31 @@ std::unique_ptr<ComputePipeline> PipelineCache::CreateComputePipeline() {
|
||||||
|
|
||||||
// Recompile shader to IR.
|
// Recompile shader to IR.
|
||||||
try {
|
try {
|
||||||
|
auto program = std::make_unique<Program>();
|
||||||
LOG_INFO(Render_Vulkan, "Compiling cs shader {:#x}", compute_key);
|
LOG_INFO(Render_Vulkan, "Compiling cs shader {:#x}", compute_key);
|
||||||
Shader::Info info =
|
Shader::Info info =
|
||||||
MakeShaderInfo(Shader::Stage::Compute, cs_pgm.user_data, liverpool->regs);
|
MakeShaderInfo(Shader::Stage::Compute, cs_pgm.user_data, liverpool->regs);
|
||||||
info.pgm_base = cs_pgm.Address<uintptr_t>();
|
info.pgm_base = cs_pgm.Address<uintptr_t>();
|
||||||
info.pgm_hash = compute_key;
|
info.pgm_hash = compute_key;
|
||||||
auto program =
|
program->pgm =
|
||||||
Shader::TranslateProgram(inst_pool, block_pool, code, std::move(info), profile);
|
Shader::TranslateProgram(inst_pool, block_pool, code, std::move(info), profile);
|
||||||
|
|
||||||
// Compile IR to SPIR-V
|
// Compile IR to SPIR-V
|
||||||
u32 binding{};
|
u32 binding{};
|
||||||
const auto spv_code = Shader::Backend::SPIRV::EmitSPIRV(profile, program, binding);
|
program->spv = Shader::Backend::SPIRV::EmitSPIRV(profile, program->pgm, binding);
|
||||||
if (Config::dumpShaders()) {
|
if (Config::dumpShaders()) {
|
||||||
DumpShader(spv_code, compute_key, Shader::Stage::Compute, "spv");
|
DumpShader(program->spv, compute_key, Shader::Stage::Compute, "spv");
|
||||||
}
|
}
|
||||||
const auto module = CompileSPV(spv_code, instance.GetDevice());
|
|
||||||
// Set module name to hash in renderdoc
|
// Compile module and set name to hash in renderdoc
|
||||||
|
program->module = CompileSPV(program->spv, instance.GetDevice());
|
||||||
const auto name = fmt::format("cs_{:#x}", compute_key);
|
const auto name = fmt::format("cs_{:#x}", compute_key);
|
||||||
Vulkan::SetObjectName(instance.GetDevice(), module, name);
|
Vulkan::SetObjectName(instance.GetDevice(), program->module, name);
|
||||||
return std::make_unique<ComputePipeline>(instance, scheduler, *pipeline_cache,
|
|
||||||
&program.info, compute_key, module);
|
// Cache program
|
||||||
|
const auto [it, _] = program_cache.emplace(compute_key, std::move(program));
|
||||||
|
return std::make_unique<ComputePipeline>(instance, scheduler, *pipeline_cache, compute_key,
|
||||||
|
it.value().get());
|
||||||
} catch (const Shader::Exception& e) {
|
} catch (const Shader::Exception& e) {
|
||||||
UNREACHABLE_MSG("{}", e.what());
|
UNREACHABLE_MSG("{}", e.what());
|
||||||
return nullptr;
|
return nullptr;
|
||||||
|
|
|
@ -5,6 +5,7 @@
|
||||||
|
|
||||||
#include <tsl/robin_map.h>
|
#include <tsl/robin_map.h>
|
||||||
#include "shader_recompiler/ir/basic_block.h"
|
#include "shader_recompiler/ir/basic_block.h"
|
||||||
|
#include "shader_recompiler/ir/program.h"
|
||||||
#include "shader_recompiler/profile.h"
|
#include "shader_recompiler/profile.h"
|
||||||
#include "video_core/renderer_vulkan/vk_compute_pipeline.h"
|
#include "video_core/renderer_vulkan/vk_compute_pipeline.h"
|
||||||
#include "video_core/renderer_vulkan/vk_graphics_pipeline.h"
|
#include "video_core/renderer_vulkan/vk_graphics_pipeline.h"
|
||||||
|
@ -43,10 +44,10 @@ private:
|
||||||
AmdGpu::Liverpool* liverpool;
|
AmdGpu::Liverpool* liverpool;
|
||||||
vk::UniquePipelineCache pipeline_cache;
|
vk::UniquePipelineCache pipeline_cache;
|
||||||
vk::UniquePipelineLayout pipeline_layout;
|
vk::UniquePipelineLayout pipeline_layout;
|
||||||
tsl::robin_map<size_t, vk::UniqueShaderModule> module_map;
|
tsl::robin_map<size_t, std::unique_ptr<Program>> program_cache;
|
||||||
std::array<vk::ShaderModule, MaxShaderStages> stages{};
|
|
||||||
tsl::robin_map<size_t, std::unique_ptr<ComputePipeline>> compute_pipelines;
|
tsl::robin_map<size_t, std::unique_ptr<ComputePipeline>> compute_pipelines;
|
||||||
tsl::robin_map<GraphicsPipelineKey, std::unique_ptr<GraphicsPipeline>> graphics_pipelines;
|
tsl::robin_map<GraphicsPipelineKey, std::unique_ptr<GraphicsPipeline>> graphics_pipelines;
|
||||||
|
std::array<const Program*, MaxShaderStages> programs{};
|
||||||
Shader::Profile profile{};
|
Shader::Profile profile{};
|
||||||
GraphicsPipelineKey graphics_key{};
|
GraphicsPipelineKey graphics_key{};
|
||||||
u64 compute_key{};
|
u64 compute_key{};
|
||||||
|
|
|
@ -153,7 +153,7 @@ void Rasterizer::BeginRendering() {
|
||||||
};
|
};
|
||||||
texture_cache.TouchMeta(htile_address, false);
|
texture_cache.TouchMeta(htile_address, false);
|
||||||
state.has_depth = true;
|
state.has_depth = true;
|
||||||
state.has_stencil = image.info.usage.stencil;
|
state.has_stencil = regs.depth_control.stencil_enable;
|
||||||
}
|
}
|
||||||
scheduler.BeginRendering(state);
|
scheduler.BeginRendering(state);
|
||||||
}
|
}
|
||||||
|
|
|
@ -249,11 +249,11 @@ struct DetilerParams {
|
||||||
u32 sizes[14];
|
u32 sizes[14];
|
||||||
};
|
};
|
||||||
|
|
||||||
static constexpr size_t StreamBufferSize = 128_MB;
|
static constexpr size_t StreamBufferSize = 1_GB;
|
||||||
|
|
||||||
TileManager::TileManager(const Vulkan::Instance& instance, Vulkan::Scheduler& scheduler)
|
TileManager::TileManager(const Vulkan::Instance& instance, Vulkan::Scheduler& scheduler)
|
||||||
: instance{instance}, scheduler{scheduler},
|
: instance{instance}, scheduler{scheduler},
|
||||||
stream_buffer{instance, scheduler, MemoryUsage::Stream, StreamBufferSize} {
|
stream_buffer{instance, scheduler, MemoryUsage::Upload, StreamBufferSize} {
|
||||||
static const std::array detiler_shaders{
|
static const std::array detiler_shaders{
|
||||||
HostShaders::DETILE_M8X1_COMP, HostShaders::DETILE_M8X2_COMP,
|
HostShaders::DETILE_M8X1_COMP, HostShaders::DETILE_M8X2_COMP,
|
||||||
HostShaders::DETILE_M32X1_COMP, HostShaders::DETILE_M32X2_COMP,
|
HostShaders::DETILE_M32X1_COMP, HostShaders::DETILE_M32X2_COMP,
|
||||||
|
|
Loading…
Reference in New Issue