Various fixes
This commit is contained in:
parent
511595aca7
commit
ea2e4f7b5c
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@ -66,7 +66,7 @@ int SDLAudio::AudioOutOpen(int type, u32 samples_num, u32 freq,
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port.sample_size = 4;
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break;
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default:
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UNREACHABLE_MSG("Unknown format");
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UNREACHABLE_MSG("Unknown format {}", u32(format));
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}
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for (int i = 0; i < port.channels_num; i++) {
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@ -234,7 +234,7 @@ s32 PS4_SYSV_ABI sceAudioOutOpen(UserService::OrbisUserServiceUserId user_id,
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"AudioOutOpen id = {} port_type = {} index = {} lenght= {} sample_rate = {} "
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"param_type = {}",
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user_id, GetAudioOutPort(port_type), index, length, sample_rate,
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GetAudioOutParam(param_type));
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GetAudioOutParam(param_type & 0xFF));
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if ((port_type < 0 || port_type > 4) && (port_type != 127)) {
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LOG_ERROR(Lib_AudioOut, "Invalid port type");
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return ORBIS_AUDIO_OUT_ERROR_INVALID_PORT_TYPE;
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@ -243,10 +243,6 @@ s32 PS4_SYSV_ABI sceAudioOutOpen(UserService::OrbisUserServiceUserId user_id,
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LOG_ERROR(Lib_AudioOut, "Invalid sample rate");
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return ORBIS_AUDIO_OUT_ERROR_INVALID_SAMPLE_FREQ;
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}
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if (param_type < 0 || param_type > 7) {
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LOG_ERROR(Lib_AudioOut, "Invalid format");
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return ORBIS_AUDIO_OUT_ERROR_INVALID_FORMAT;
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}
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if (length != 256 && length != 512 && length != 768 && length != 1024 && length != 1280 &&
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length != 1536 && length != 1792 && length != 2048) {
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LOG_ERROR(Lib_AudioOut, "Invalid length");
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@ -255,7 +251,7 @@ s32 PS4_SYSV_ABI sceAudioOutOpen(UserService::OrbisUserServiceUserId user_id,
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if (index != 0) {
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LOG_ERROR(Lib_AudioOut, "index is not valid !=0 {}", index);
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}
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int result = audio->AudioOutOpen(port_type, length, sample_rate, param_type);
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int result = audio->AudioOutOpen(port_type, length, sample_rate, OrbisAudioOutParam(param_type & 0xFF));
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if (result == -1) {
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LOG_ERROR(Lib_AudioOut, "Audio ports are full");
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return ORBIS_AUDIO_OUT_ERROR_PORT_FULL;
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@ -28,7 +28,7 @@ int PS4_SYSV_ABI sceKernelAllocateDirectMemory(s64 searchStart, s64 searchEnd, u
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LOG_ERROR(Kernel_Vmm, "Provided address range is invalid!");
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return SCE_KERNEL_ERROR_EINVAL;
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}
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if ((alignment != 0 || Common::Is16KBAligned(alignment)) && !std::has_single_bit(alignment)) {
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if (alignment != 0 && !Common::Is16KBAligned(alignment)) {
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LOG_ERROR(Kernel_Vmm, "Alignment value is invalid!");
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return SCE_KERNEL_ERROR_EINVAL;
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}
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@ -10,7 +10,6 @@
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#include "core/libraries/error_codes.h"
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#include "core/libraries/kernel/thread_management.h"
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#include "core/libraries/libs.h"
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#include "core/tls.h"
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#include "core/linker.h"
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#ifdef _WIN64
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#include <windows.h>
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@ -516,7 +515,7 @@ int PS4_SYSV_ABI scePthreadMutexLock(ScePthreadMutex* mutex) {
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int result = pthread_mutex_lock(&(*mutex)->pth_mutex);
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if (result != 0) {
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LOG_INFO(Kernel_Pthread, "name={}, result={}", (*mutex)->name, result);
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//LOG_INFO(Kernel_Pthread, "name={}, result={}", (*mutex)->name, result);
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}
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switch (result) {
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case 0:
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@ -539,7 +538,7 @@ int PS4_SYSV_ABI scePthreadMutexUnlock(ScePthreadMutex* mutex) {
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int result = pthread_mutex_unlock(&(*mutex)->pth_mutex);
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if (result != 0) {
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LOG_INFO(Kernel_Pthread, "name={}, result={}", (*mutex)->name, result);
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//LOG_INFO(Kernel_Pthread, "name={}, result={}", (*mutex)->name, result);
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}
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switch (result) {
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case 0:
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@ -1122,6 +1121,34 @@ void* PS4_SYSV_ABI __tls_get_addr(TlsIndex* index) {
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return linker->TlsGetAddr(index->ti_module, index->ti_offset);
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}
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int PS4_SYSV_ABI posix_sem_init(sem_t *sem, int pshared, unsigned int value) {
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return sem_init(sem, pshared, value);
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}
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int PS4_SYSV_ABI posix_sem_wait(sem_t *sem) {
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return sem_wait(sem);
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}
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int PS4_SYSV_ABI posix_sem_post(sem_t *sem) {
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return sem_post(sem);
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}
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int PS4_SYSV_ABI posix_pthread_mutex_destroy(ScePthreadMutex* mutex) {
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// LOG_INFO(Kernel_Pthread, "posix pthread_mutex_init redirect to scePthreadMutexInit");
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int result = scePthreadMutexDestroy(mutex);
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if (result < 0) {
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int rt = result > SCE_KERNEL_ERROR_UNKNOWN && result <= SCE_KERNEL_ERROR_ESTOP
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? result + -SCE_KERNEL_ERROR_UNKNOWN
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: POSIX_EOTHER;
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return rt;
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}
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return result;
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}
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int PS4_SYSV_ABI posix_pthread_join(ScePthread thread, void** value_ptr) {
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return pthread_join(thread->pth, value_ptr);
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}
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void pthreadSymbolsRegister(Core::Loader::SymbolsResolver* sym) {
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LIB_FUNCTION("4+h9EzwKF4I", "libkernel", 1, "libkernel", 1, 1, scePthreadAttrSetschedpolicy);
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LIB_FUNCTION("-Wreprtu0Qs", "libkernel", 1, "libkernel", 1, 1, scePthreadAttrSetdetachstate);
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@ -1173,9 +1200,14 @@ void pthreadSymbolsRegister(Core::Loader::SymbolsResolver* sym) {
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LIB_FUNCTION("dQHWEsJtoE4", "libScePosix", 1, "libkernel", 1, 1, pthread_mutexattr_init);
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LIB_FUNCTION("mDmgMOGVUqg", "libScePosix", 1, "libkernel", 1, 1, pthread_mutexattr_settype);
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LIB_FUNCTION("ttHNfU+qDBU", "libScePosix", 1, "libkernel", 1, 1, posix_pthread_mutex_init);
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LIB_FUNCTION("ltCfaGr2JGE", "libScePosix", 1, "libkernel", 1, 1, posix_pthread_mutex_destroy);
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LIB_FUNCTION("7H0iTOciTLo", "libScePosix", 1, "libkernel", 1, 1, posix_pthread_mutex_lock);
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LIB_FUNCTION("2Z+PpY6CaJg", "libScePosix", 1, "libkernel", 1, 1, posix_pthread_mutex_unlock);
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LIB_FUNCTION("mkx2fVhNMsg", "libScePosix", 1, "libkernel", 1, 1, posix_pthread_cond_broadcast);
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LIB_FUNCTION("h9CcP3J0oVM", "libScePosix", 1, "libkernel", 1, 1, posix_pthread_join);
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LIB_FUNCTION("pDuPEf3m4fI", "libScePosix", 1, "libkernel", 1, 1, posix_sem_init);
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LIB_FUNCTION("YCV5dGGBcCo", "libScePosix", 1, "libkernel", 1, 1, posix_sem_wait);
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LIB_FUNCTION("IKP8typ0QUk", "libScePosix", 1, "libkernel", 1, 1, posix_sem_post);
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LIB_FUNCTION("QBi7HCK03hw", "libkernel", 1, "libkernel", 1, 1, sceKernelClockGettime);
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LIB_FUNCTION("lLMT9vJAck0", "libkernel", 1, "libkernel", 1, 1, clock_gettime);
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@ -8,6 +8,7 @@
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#include <string>
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#include <vector>
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#include <pthread.h>
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#include <semaphore.h>
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#include <sched.h>
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#include "common/types.h"
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@ -57,24 +57,24 @@ void Linker::Execute() {
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}
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// Calculate static TLS size.
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static constexpr size_t StOff = 0x80; // TODO: What is this offset?
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static_tls_size = std::ranges::fold_left(m_modules, StOff, [&](u32 size, auto& module) {
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const size_t new_size = size + module->tls.image_size;
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module->tls.distance_from_fs = new_size;
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return new_size;
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});
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Common::SetCurrentThreadName("GAME_MainThread");
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Libraries::Kernel::pthreadInitSelfMainThread();
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// Init primary thread TLS.
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InitTlsForThread(true);
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for (const auto& module : m_modules) {
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if (module->tls.image_size != 0) {
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module->tls.modid = ++max_tls_index;
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}
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static_tls_size += module->tls.image_size;
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module->tls.offset = static_tls_size;
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}
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// Relocate all modules
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for (u32 i = 1; const auto& m : m_modules) {
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Relocate(i, m.get());
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for (const auto& m : m_modules) {
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Relocate(m.get());
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}
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// Init primary thread.
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Common::SetCurrentThreadName("GAME_MainThread");
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Libraries::Kernel::pthreadInitSelfMainThread();
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InitTlsForThread(true);
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// Start shared library modules
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for (auto& m : m_modules) {
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if (m->IsSharedLib()) {
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@ -113,7 +113,7 @@ Module* Linker::LoadModule(const std::filesystem::path& elf_name) {
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return m_modules.emplace_back(std::move(module)).get();
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}
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void Linker::Relocate(u32 index, Module* module) {
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void Linker::Relocate(Module* module) {
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module->ForEachRelocation([&](elf_relocation* rel, bool isJmpRel) {
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auto type = rel->GetType();
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auto symbol = rel->GetSymbol();
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@ -134,7 +134,7 @@ void Linker::Relocate(u32 index, Module* module) {
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rel_is_resolved = true;
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break;
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case R_X86_64_DTPMOD64:
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rel_value = static_cast<uint64_t>(index);
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rel_value = static_cast<u64>(module->tls.modid);
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rel_is_resolved = true;
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rel_sym_type = Loader::SymbolType::Tls;
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break;
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@ -254,10 +254,11 @@ void Linker::Resolve(const std::string& name, Loader::SymbolType sym_type, Modul
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}
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void* Linker::TlsGetAddr(u64 module_index, u64 offset) {
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DtvEntry* dtv_table = GetTcbBase()->tcb_dtv;
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ASSERT_MSG(dtv_table[0].counter == dtv_generation_counter,
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"Reallocation of DTV table is not supported");
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void* module = dtv_table[module_index + 1].pointer;
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void* module = (u8*)dtv_table[module_index + 1].pointer + offset;
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ASSERT_MSG(module, "DTV allocation is not supported");
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return module;
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}
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@ -286,26 +287,29 @@ void Linker::InitTlsForThread(bool is_primary) {
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}
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// Initialize allocated memory and allocate DTV table.
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const u32 num_dtvs = m_modules.size() - 1;
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const u32 num_dtvs = max_tls_index;
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std::memset(addr_out, 0, total_tls_size);
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dtv_table.resize(num_dtvs + 2);
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DtvEntry* dtv_table = new DtvEntry[num_dtvs + 2];
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// Initialize thread control block
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u8* addr = reinterpret_cast<u8*>(addr_out);
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Tcb* tcb = reinterpret_cast<Tcb*>(addr + static_tls_size);
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tcb->tcb_self = tcb;
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tcb->tcb_dtv = dtv_table.data();
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tcb->tcb_dtv = dtv_table;
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// Dtv[0] is the generation counter. libkernel puts their number into dtv[1] (why?)
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dtv_table[0].counter = dtv_generation_counter;
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dtv_table[1].counter = num_dtvs;
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// Copy init images to TLS thread blocks and map them to DTV slots.
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for (u32 i = 2; const auto& module : m_modules) {
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u8* dest = reinterpret_cast<u8*>(addr + static_tls_size - module->tls.distance_from_fs);
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for (const auto& module : m_modules) {
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if (module->tls.image_size == 0) {
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continue;
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}
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u8* dest = reinterpret_cast<u8*>(addr + static_tls_size - module->tls.offset);
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const u8* src = reinterpret_cast<const u8*>(module->tls.image_virtual_addr);
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std::memcpy(dest, src, module->tls.init_image_size);
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tcb->tcb_dtv[i++].pointer = dest;
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tcb->tcb_dtv[module->tls.modid + 1].pointer = dest;
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}
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// Set pointer to FS base
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@ -17,19 +17,6 @@ struct EntryParams {
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const char* argv[3];
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};
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union DtvEntry {
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struct {
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size_t counter;
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};
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void* pointer;
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};
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struct Tcb {
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Tcb* tcb_self;
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DtvEntry* tcb_dtv;
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void* tcb_thread;
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};
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using HeapApiFunc = PS4_SYSV_ABI void*(*)(size_t);
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class Linker {
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@ -54,7 +41,7 @@ public:
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Module* LoadModule(const std::filesystem::path& elf_name);
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void Relocate(u32 index, Module* module);
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void Relocate(Module* module);
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void Resolve(const std::string& name, Loader::SymbolType type,
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Module* module, Loader::SymbolRecord* return_info);
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void Execute();
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@ -64,9 +51,9 @@ private:
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const Module* FindExportedModule(const ModuleInfo& m, const LibraryInfo& l);
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void InitTls();
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std::vector<DtvEntry> dtv_table;
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u32 dtv_generation_counter{1};
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size_t static_tls_size{};
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size_t max_tls_index{};
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HeapApiFunc heap_api_func{};
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std::vector<std::unique_ptr<Module>> m_modules;
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Loader::SymbolsResolver m_hle_symbols{};
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@ -35,7 +35,9 @@ PAddr MemoryManager::Allocate(PAddr search_start, PAddr search_end, size_t size,
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}
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// Align free position
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if (alignment > 0) {
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free_addr = Common::AlignUp(free_addr, alignment);
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}
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ASSERT(free_addr >= search_start && free_addr + size <= search_end);
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// Add the allocated region to the list and commit its pages.
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@ -47,10 +47,11 @@ struct LibraryInfo {
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struct ThreadLocalImage {
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u64 align;
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u64 image_size;
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u64 offset;
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u32 modid;
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VAddr image_virtual_addr;
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u64 init_image_size;
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u64 image_size;
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u64 distance_from_fs;
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};
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struct DynamicModuleInfo {
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@ -166,7 +167,7 @@ public:
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std::vector<u8> m_dynamic_data;
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Loader::SymbolsResolver export_sym;
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Loader::SymbolsResolver import_sym;
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ThreadLocalImage tls;
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ThreadLocalImage tls{};
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};
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} // namespace Core
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@ -49,6 +49,10 @@ void SetTcbBase(void* image_address) {
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ASSERT(result != 0);
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}
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Tcb* GetTcbBase() {
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return reinterpret_cast<Tcb*>(TlsGetValue(slot));
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}
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void PatchTLS(u64 segment_addr, u64 segment_size, Xbyak::CodeGenerator& c) {
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using namespace Xbyak::util;
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@ -11,9 +11,23 @@ class CodeGenerator;
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namespace Core {
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union DtvEntry {
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size_t counter;
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void* pointer;
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};
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struct Tcb {
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Tcb* tcb_self;
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DtvEntry* tcb_dtv;
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void* tcb_thread;
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};
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/// Sets the data pointer to the TCB block.
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void SetTcbBase(void* image_address);
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/// Retrieves Tcb structure for the calling thread.
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Tcb* GetTcbBase();
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/// Patches any instructions that access guest TLS to use provided storage.
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void PatchTLS(u64 segment_addr, u64 segment_size, Xbyak::CodeGenerator& c);
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@ -87,6 +87,7 @@ int main(int argc, char* argv[]) {
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linker->LoadModule(entry.path().string().c_str());
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}
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}
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// Check if there is a libc.prx in sce_module folder
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bool found = false;
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if (Config::isLleLibc()) {
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@ -94,7 +95,8 @@ int main(int argc, char* argv[]) {
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if (std::filesystem::is_directory(sce_module_folder)) {
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for (const auto& entry : std::filesystem::directory_iterator(sce_module_folder)) {
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if (entry.path().filename() == "libc.prx" ||
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entry.path().filename() == "libSceFios2.prx") {
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entry.path().filename() == "libSceFios2.prx" ||
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entry.path().filename() == "libSceNpToolkit2.prx") {
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found = true;
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LOG_INFO(Loader, "Loading {}", entry.path().string().c_str());
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linker->LoadModule(entry.path().string().c_str());
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@ -105,6 +107,7 @@ int main(int argc, char* argv[]) {
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if (!found) {
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Libraries::LibC::libcSymbolsRegister(&linker->GetHLESymbols());
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}
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std::thread mainthread([linker]() { linker->Execute(); });
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Discord::RPC discordRPC;
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discordRPC.init();
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@ -55,8 +55,20 @@ void Translator::S_ANDN2_B64(const GcnInst& inst) {
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const IR::U1 src0{get_src(inst.src[0])};
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const IR::U1 src1{get_src(inst.src[1])};
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const IR::U1 result{ir.LogicalAnd(src0, ir.LogicalNot(src1))};
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SetDst(inst.dst[0], result);
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ir.SetScc(result);
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switch (inst.dst[0].field) {
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case OperandField::VccLo:
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ir.SetVcc(result);
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break;
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case OperandField::ExecLo:
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ir.SetExec(result);
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break;
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case OperandField::ScalarGPR:
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ir.SetThreadBitScalarReg(IR::ScalarReg(inst.dst[0].code), result);
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break;
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default:
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UNREACHABLE();
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}
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}
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|
||||
void Translator::S_AND_SAVEEXEC_B64(const GcnInst& inst) {
|
||||
|
@ -124,9 +136,17 @@ void Translator::S_OR_B64(bool negate, const GcnInst& inst) {
|
|||
if (negate) {
|
||||
result = ir.LogicalNot(result);
|
||||
}
|
||||
ASSERT(inst.dst[0].field == OperandField::VccLo);
|
||||
ir.SetVcc(result);
|
||||
ir.SetScc(result);
|
||||
switch (inst.dst[0].field) {
|
||||
case OperandField::VccLo:
|
||||
ir.SetVcc(result);
|
||||
break;
|
||||
case OperandField::ScalarGPR:
|
||||
ir.SetThreadBitScalarReg(IR::ScalarReg(inst.dst[0].code), result);
|
||||
break;
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
void Translator::S_AND_B64(const GcnInst& inst) {
|
||||
|
@ -145,9 +165,17 @@ void Translator::S_AND_B64(const GcnInst& inst) {
|
|||
const IR::U1 src0{get_src(inst.src[0])};
|
||||
const IR::U1 src1{get_src(inst.src[1])};
|
||||
const IR::U1 result = ir.LogicalAnd(src0, src1);
|
||||
ASSERT(inst.dst[0].field == OperandField::VccLo);
|
||||
ir.SetVcc(result);
|
||||
ir.SetScc(result);
|
||||
switch (inst.dst[0].field) {
|
||||
case OperandField::VccLo:
|
||||
ir.SetVcc(result);
|
||||
break;
|
||||
case OperandField::ScalarGPR:
|
||||
ir.SetThreadBitScalarReg(IR::ScalarReg(inst.dst[0].code), result);
|
||||
break;
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
void Translator::S_ADD_I32(const GcnInst& inst) {
|
||||
|
@ -179,6 +207,36 @@ void Translator::S_CSELECT_B32(const GcnInst& inst) {
|
|||
SetDst(inst.dst[0], IR::U32{ir.Select(ir.GetScc(), src0, src1)});
|
||||
}
|
||||
|
||||
void Translator::S_CSELECT_B64(const GcnInst& inst) {
|
||||
const auto get_src = [&](const InstOperand& operand) {
|
||||
switch (operand.field) {
|
||||
case OperandField::VccLo:
|
||||
return ir.GetVcc();
|
||||
case OperandField::ExecLo:
|
||||
return ir.GetExec();
|
||||
case OperandField::ScalarGPR:
|
||||
return ir.GetThreadBitScalarReg(IR::ScalarReg(operand.code));
|
||||
case OperandField::ConstZero:
|
||||
return ir.Imm1(false);
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
};
|
||||
const IR::U1 src0{get_src(inst.src[0])};
|
||||
const IR::U1 src1{get_src(inst.src[1])};
|
||||
const IR::U1 result{ir.Select(ir.GetScc(), src0, src1)};
|
||||
switch (inst.dst[0].field) {
|
||||
case OperandField::VccLo:
|
||||
ir.SetVcc(result);
|
||||
break;
|
||||
case OperandField::ScalarGPR:
|
||||
ir.SetThreadBitScalarReg(IR::ScalarReg(inst.dst[0].code), result);
|
||||
break;
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
void Translator::S_BFE_U32(const GcnInst& inst) {
|
||||
const IR::U32 src0{GetSrc(inst.src[0])};
|
||||
const IR::U32 src1{GetSrc(inst.src[1])};
|
||||
|
|
|
@ -5,30 +5,15 @@
|
|||
|
||||
namespace Shader::Gcn {
|
||||
|
||||
void Load(IR::IREmitter& ir, int num_dwords, const IR::Value& handle, IR::ScalarReg dst_reg,
|
||||
const IR::U32U64& address) {
|
||||
for (u32 i = 0; i < num_dwords; i++) {
|
||||
if (handle.IsEmpty()) {
|
||||
ir.SetScalarReg(dst_reg++, ir.ReadConst(address, ir.Imm32(i)));
|
||||
} else {
|
||||
const IR::U32 index = ir.IAdd(address, ir.Imm32(i));
|
||||
ir.SetScalarReg(dst_reg++, ir.ReadConstBuffer(handle, index));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void Translator::S_LOAD_DWORD(int num_dwords, const GcnInst& inst) {
|
||||
const auto& smrd = inst.control.smrd;
|
||||
ASSERT_MSG(smrd.imm, "Bindless texture loads unsupported");
|
||||
const IR::ScalarReg sbase{inst.src[0].code * 2};
|
||||
const IR::U32 offset =
|
||||
smrd.imm ? ir.Imm32(smrd.offset * 4)
|
||||
: IR::U32{ir.ShiftLeftLogical(ir.GetScalarReg(IR::ScalarReg(smrd.offset)),
|
||||
ir.Imm32(2))};
|
||||
const IR::U64 base =
|
||||
ir.PackUint2x32(ir.CompositeConstruct(ir.GetScalarReg(sbase), ir.GetScalarReg(sbase + 1)));
|
||||
const IR::U64 address = ir.IAdd(base, offset);
|
||||
const IR::ScalarReg dst_reg{inst.dst[0].code};
|
||||
Load(ir, num_dwords, {}, dst_reg, address);
|
||||
const IR::Value base = ir.CompositeConstruct(ir.GetScalarReg(sbase), ir.GetScalarReg(sbase + 1));
|
||||
IR::ScalarReg dst_reg{inst.dst[0].code};
|
||||
for (u32 i = 0; i < num_dwords; i++) {
|
||||
ir.SetScalarReg(dst_reg++, ir.ReadConst(base, ir.Imm32(smrd.offset + i)));
|
||||
}
|
||||
}
|
||||
|
||||
void Translator::S_BUFFER_LOAD_DWORD(int num_dwords, const GcnInst& inst) {
|
||||
|
@ -37,8 +22,11 @@ void Translator::S_BUFFER_LOAD_DWORD(int num_dwords, const GcnInst& inst) {
|
|||
const IR::U32 dword_offset =
|
||||
smrd.imm ? ir.Imm32(smrd.offset) : ir.GetScalarReg(IR::ScalarReg(smrd.offset));
|
||||
const IR::Value vsharp = ir.GetScalarReg(sbase);
|
||||
const IR::ScalarReg dst_reg{inst.dst[0].code};
|
||||
Load(ir, num_dwords, vsharp, dst_reg, dword_offset);
|
||||
IR::ScalarReg dst_reg{inst.dst[0].code};
|
||||
for (u32 i = 0; i < num_dwords; i++) {
|
||||
const IR::U32 index = ir.IAdd(dword_offset, ir.Imm32(i));
|
||||
ir.SetScalarReg(dst_reg++, ir.ReadConstBuffer(vsharp, index));
|
||||
}
|
||||
}
|
||||
|
||||
} // namespace Shader::Gcn
|
||||
|
|
|
@ -256,6 +256,12 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
|
|||
break;
|
||||
case Opcode::S_WAITCNT:
|
||||
break;
|
||||
case Opcode::S_LOAD_DWORDX4:
|
||||
translator.S_LOAD_DWORD(4, inst);
|
||||
break;
|
||||
case Opcode::S_LOAD_DWORDX8:
|
||||
translator.S_LOAD_DWORD(8, inst);
|
||||
break;
|
||||
case Opcode::S_BUFFER_LOAD_DWORD:
|
||||
translator.S_BUFFER_LOAD_DWORD(1, inst);
|
||||
break;
|
||||
|
@ -356,9 +362,15 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
|
|||
case Opcode::S_CMP_LG_U32:
|
||||
translator.S_CMP(ConditionOp::LG, false, inst);
|
||||
break;
|
||||
case Opcode::S_CMP_LG_I32:
|
||||
translator.S_CMP(ConditionOp::LG, true, inst);
|
||||
break;
|
||||
case Opcode::S_CMP_EQ_I32:
|
||||
translator.S_CMP(ConditionOp::EQ, true, inst);
|
||||
break;
|
||||
case Opcode::S_CMP_EQ_U32:
|
||||
translator.S_CMP(ConditionOp::EQ, false, inst);
|
||||
break;
|
||||
case Opcode::V_CNDMASK_B32:
|
||||
translator.V_CNDMASK_B32(inst);
|
||||
break;
|
||||
|
@ -509,6 +521,9 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
|
|||
case Opcode::S_CSELECT_B32:
|
||||
translator.S_CSELECT_B32(inst);
|
||||
break;
|
||||
case Opcode::S_CSELECT_B64:
|
||||
translator.S_CSELECT_B64(inst);
|
||||
break;
|
||||
case Opcode::S_BFE_U32:
|
||||
translator.S_BFE_U32(inst);
|
||||
break;
|
||||
|
@ -516,6 +531,8 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
|
|||
case Opcode::S_CBRANCH_EXECZ:
|
||||
case Opcode::S_CBRANCH_SCC0:
|
||||
case Opcode::S_CBRANCH_SCC1:
|
||||
case Opcode::S_CBRANCH_VCCNZ:
|
||||
case Opcode::S_CBRANCH_VCCZ:
|
||||
case Opcode::S_BRANCH:
|
||||
case Opcode::S_WQM_B64:
|
||||
case Opcode::V_INTERP_P1_F32:
|
||||
|
@ -523,7 +540,7 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
|
|||
break;
|
||||
default:
|
||||
const u32 opcode = u32(inst.opcode);
|
||||
UNREACHABLE_MSG("Unknown opcode {}", opcode);
|
||||
throw NotImplementedException("Opcode {}", opcode);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -46,6 +46,7 @@ public:
|
|||
void S_AND_B32(const GcnInst& inst);
|
||||
void S_LSHR_B32(const GcnInst& inst);
|
||||
void S_CSELECT_B32(const GcnInst& inst);
|
||||
void S_CSELECT_B64(const GcnInst& inst);
|
||||
void S_BFE_U32(const GcnInst& inst);
|
||||
|
||||
// Scalar Memory
|
||||
|
|
|
@ -85,21 +85,21 @@ void Translator::V_CVT_F32_U32(const GcnInst& inst) {
|
|||
}
|
||||
|
||||
void Translator::V_MAD_F32(const GcnInst& inst) {
|
||||
const IR::F32 src0{GetSrc(inst.src[0])};
|
||||
const IR::F32 src1{GetSrc(inst.src[1])};
|
||||
const IR::F32 src2{GetSrc(inst.src[2])};
|
||||
const IR::F32 src0{GetSrc(inst.src[0], true)};
|
||||
const IR::F32 src1{GetSrc(inst.src[1], true)};
|
||||
const IR::F32 src2{GetSrc(inst.src[2], true)};
|
||||
SetDst(inst.dst[0], ir.FPFma(src0, src1, src2));
|
||||
}
|
||||
|
||||
void Translator::V_FRACT_F32(const GcnInst& inst) {
|
||||
const IR::F32 src0{GetSrc(inst.src[0])};
|
||||
const IR::F32 src0{GetSrc(inst.src[0], true)};
|
||||
const IR::VectorReg dst_reg{inst.dst[0].code};
|
||||
ir.SetVectorReg(dst_reg, ir.Fract(src0));
|
||||
}
|
||||
|
||||
void Translator::V_ADD_F32(const GcnInst& inst) {
|
||||
const IR::F32 src0{GetSrc(inst.src[0])};
|
||||
const IR::F32 src1{GetSrc(inst.src[1])};
|
||||
const IR::F32 src0{GetSrc(inst.src[0], true)};
|
||||
const IR::F32 src1{GetSrc(inst.src[1], true)};
|
||||
SetDst(inst.dst[0], ir.FPAdd(src0, src1));
|
||||
}
|
||||
|
||||
|
@ -114,14 +114,14 @@ void Translator::V_CVT_OFF_F32_I4(const GcnInst& inst) {
|
|||
|
||||
void Translator::V_MED3_F32(const GcnInst& inst) {
|
||||
const IR::F32 src0{GetSrc(inst.src[0], true)};
|
||||
const IR::F32 src1{GetSrc(inst.src[1])};
|
||||
const IR::F32 src2{GetSrc(inst.src[2])};
|
||||
const IR::F32 src1{GetSrc(inst.src[1], true)};
|
||||
const IR::F32 src2{GetSrc(inst.src[2], true)};
|
||||
const IR::F32 mmx = ir.FPMin(ir.FPMax(src0, src1), src2);
|
||||
SetDst(inst.dst[0], ir.FPMax(ir.FPMin(src0, src1), mmx));
|
||||
}
|
||||
|
||||
void Translator::V_FLOOR_F32(const GcnInst& inst) {
|
||||
const IR::F32 src0{GetSrc(inst.src[0])};
|
||||
const IR::F32 src0{GetSrc(inst.src[0], true)};
|
||||
const IR::VectorReg dst_reg{inst.dst[0].code};
|
||||
ir.SetVectorReg(dst_reg, ir.FPFloor(src0));
|
||||
}
|
||||
|
@ -167,7 +167,17 @@ void Translator::V_CMP_F32(ConditionOp op, const GcnInst& inst) {
|
|||
UNREACHABLE();
|
||||
}
|
||||
}();
|
||||
|
||||
switch (inst.dst[1].field) {
|
||||
case OperandField::VccLo:
|
||||
ir.SetVcc(result);
|
||||
break;
|
||||
case OperandField::ScalarGPR:
|
||||
ir.SetThreadBitScalarReg(IR::ScalarReg(inst.dst[1].code), result);
|
||||
break;
|
||||
default:
|
||||
UNREACHABLE();
|
||||
}
|
||||
}
|
||||
|
||||
void Translator::V_MAX_F32(const GcnInst& inst) {
|
||||
|
|
|
@ -273,8 +273,8 @@ void IREmitter::WriteShared(int bit_size, const Value& value, const U32& offset)
|
|||
}*/
|
||||
}
|
||||
|
||||
U32 IREmitter::ReadConst(const U64& address, const U32& offset) {
|
||||
return Inst<U32>(Opcode::ReadConst, address, offset);
|
||||
U32 IREmitter::ReadConst(const Value& base, const U32& offset) {
|
||||
return Inst<U32>(Opcode::ReadConst, base, offset);
|
||||
}
|
||||
|
||||
F32 IREmitter::ReadConstBuffer(const Value& handle, const U32& index) {
|
||||
|
|
|
@ -77,7 +77,7 @@ public:
|
|||
[[nodiscard]] U32U64 ReadShared(int bit_size, bool is_signed, const U32& offset);
|
||||
void WriteShared(int bit_size, const Value& value, const U32& offset);
|
||||
|
||||
[[nodiscard]] U32 ReadConst(const U64& address, const U32& offset);
|
||||
[[nodiscard]] U32 ReadConst(const Value& base, const U32& offset);
|
||||
[[nodiscard]] F32 ReadConstBuffer(const Value& handle, const U32& index);
|
||||
|
||||
[[nodiscard]] Value LoadBuffer(int num_dwords, const Value& handle, const Value& address,
|
||||
|
|
|
@ -15,7 +15,7 @@ OPCODE(Epilogue, Void,
|
|||
OPCODE(Discard, Void, )
|
||||
|
||||
// Constant memory operations
|
||||
OPCODE(ReadConst, U32, U64, U32, )
|
||||
OPCODE(ReadConst, U32, U32x2, U32, )
|
||||
OPCODE(ReadConstBuffer, F32, Opaque, U32, )
|
||||
OPCODE(ReadConstBufferU32, U32, Opaque, U32, )
|
||||
|
||||
|
|
|
@ -157,16 +157,15 @@ SharpLocation TrackSharp(const IR::Inst* inst) {
|
|||
ASSERT_MSG(inst->GetOpcode() == IR::Opcode::ReadConst, "Sharp load not from constant memory");
|
||||
|
||||
// Retrieve offset from base.
|
||||
IR::Inst* addr = inst->Arg(0).InstRecursive();
|
||||
u32 dword_offset = addr->Arg(1).U32();
|
||||
addr = addr->Arg(0).InstRecursive();
|
||||
ASSERT_MSG(addr->Arg(1).IsImmediate(), "Bindless not supported");
|
||||
dword_offset += addr->Arg(1).U32() >> 2;
|
||||
const u32 dword_offset = inst->Arg(1).U32();
|
||||
const IR::Inst* spgpr_base = inst->Arg(0).InstRecursive();
|
||||
|
||||
// Retrieve SGPR that holds sbase
|
||||
inst = addr->Arg(0).InstRecursive()->Arg(0).InstRecursive();
|
||||
ASSERT_MSG(inst->GetOpcode() == IR::Opcode::GetUserData, "Nested resource loads not supported");
|
||||
const IR::ScalarReg base = inst->Arg(0).ScalarReg();
|
||||
// Retrieve SGPR pair that holds sbase
|
||||
const IR::Inst* sbase0 = spgpr_base->Arg(0).InstRecursive();
|
||||
const IR::Inst* sbase1 = spgpr_base->Arg(1).InstRecursive();
|
||||
ASSERT_MSG(sbase0->GetOpcode() == IR::Opcode::GetUserData &&
|
||||
sbase1->GetOpcode() == IR::Opcode::GetUserData, "Nested resource loads not supported");
|
||||
const IR::ScalarReg base = sbase0->Arg(0).ScalarReg();
|
||||
|
||||
// Return retrieved location.
|
||||
return SharpLocation{
|
||||
|
|
|
@ -160,8 +160,13 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline() {
|
|||
inst_pool.ReleaseContents();
|
||||
|
||||
// Recompile shader to IR.
|
||||
try {
|
||||
const Shader::Info info = MakeShaderInfo(stage, pgm->user_data, regs);
|
||||
programs[i] = Shader::TranslateProgram(inst_pool, block_pool, code, std::move(info));
|
||||
} catch (const Shader::Exception& e) {
|
||||
LOG_ERROR(Render_Vulkan, "{}", e.what());
|
||||
std::abort();
|
||||
}
|
||||
|
||||
// Compile IR to SPIR-V
|
||||
auto spv_code = Shader::Backend::SPIRV::EmitSPIRV(profile, programs[i], binding);
|
||||
|
|
|
@ -58,7 +58,7 @@ LONG WINAPI GuestFaultSignalHandler(EXCEPTION_POINTERS* pExp) noexcept {
|
|||
}
|
||||
#endif
|
||||
|
||||
static constexpr u64 StreamBufferSize = 128_MB;
|
||||
static constexpr u64 StreamBufferSize = 512_MB;
|
||||
static constexpr u64 PageShift = 12;
|
||||
|
||||
TextureCache::TextureCache(const Vulkan::Instance& instance_, Vulkan::Scheduler& scheduler_)
|
||||
|
|
Loading…
Reference in New Issue