shader_recompiler: added V_MAX VOP2 (431, 433)
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@ -424,6 +424,12 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
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case Opcode::V_MAX_F32:
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translator.V_MAX_F32(inst);
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break;
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case Opcode::V_MAX_I32:
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translator.V_MAX_U32(true, inst);
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break;
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case Opcode::V_MAX_U32:
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translator.V_MAX_U32(false, inst);
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break;
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case Opcode::V_RSQ_F32:
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translator.V_RSQ_F32(inst);
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break;
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@ -80,6 +80,7 @@ public:
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void V_FMA_F32(const GcnInst& inst);
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void V_CMP_F32(ConditionOp op, bool set_exec, const GcnInst& inst);
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void V_MAX_F32(const GcnInst& inst);
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void V_MAX_U32(bool is_signed, const GcnInst& inst);
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void V_RSQ_F32(const GcnInst& inst);
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void V_SIN_F32(const GcnInst& inst);
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void V_LOG_F32(const GcnInst& inst);
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@ -197,6 +197,12 @@ void Translator::V_MAX_F32(const GcnInst& inst) {
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SetDst(inst.dst[0], ir.FPMax(src0, src1));
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}
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void Translator::V_MAX_U32(bool is_signed, const GcnInst& inst) {
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const IR::U32 src0{GetSrc(inst.src[0])};
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const IR::U32 src1{GetSrc(inst.src[1])};
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SetDst(inst.dst[0], ir.IMax(src0, src1, is_signed));
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}
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void Translator::V_RSQ_F32(const GcnInst& inst) {
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const IR::F32 src0{GetSrc(inst.src[0], true)};
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SetDst(inst.dst[0], ir.FPRecipSqrt(src0));
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