buffer: Don't leak texel buffers, blacklist stream buffer with texel buffers
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@ -119,7 +119,7 @@ vk::BufferView Buffer::View(u32 offset, u32 size, bool is_written, AmdGpu::DataF
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dfmt == view.dfmt && nfmt == view.nfmt;
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})};
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if (it != views.end()) {
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return it->handle;
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return *it->handle;
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}
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const vk::BufferUsageFlags2CreateInfoKHR usage_flags = {
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.usage = is_written ? vk::BufferUsageFlagBits2KHR::eStorageTexelBuffer
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@ -138,9 +138,9 @@ vk::BufferView Buffer::View(u32 offset, u32 size, bool is_written, AmdGpu::DataF
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.is_written = is_written,
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.dfmt = dfmt,
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.nfmt = nfmt,
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.handle = instance->GetDevice().createBufferView(view_ci),
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.handle = instance->GetDevice().createBufferViewUnique(view_ci),
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});
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return views.back().handle;
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return *views.back().handle;
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}
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constexpr u64 WATCHES_INITIAL_RESERVE = 0x4000;
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@ -134,7 +134,7 @@ public:
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bool is_written;
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AmdGpu::DataFormat dfmt;
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AmdGpu::NumberFormat nfmt;
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vk::BufferView handle;
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vk::UniqueBufferView handle;
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};
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std::vector<BufferView> views;
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};
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@ -228,11 +228,12 @@ u32 BufferCache::BindIndexBuffer(bool& is_indexed, u32 index_offset) {
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return regs.num_indices;
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}
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std::pair<Buffer*, u32> BufferCache::ObtainBuffer(VAddr device_addr, u32 size, bool is_written) {
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std::pair<Buffer*, u32> BufferCache::ObtainBuffer(VAddr device_addr, u32 size, bool is_written,
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bool is_texel_buffer) {
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std::scoped_lock lk{mutex};
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static constexpr u64 StreamThreshold = CACHING_PAGESIZE;
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const bool is_gpu_dirty = memory_tracker.IsRegionGpuModified(device_addr, size);
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if (!is_written && size < StreamThreshold && !is_gpu_dirty) {
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if (!is_written && !is_texel_buffer && size <= StreamThreshold && !is_gpu_dirty) {
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// For small uniform buffers that have not been modified by gpu
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// use device local stream buffer to reduce renderpass breaks.
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const u64 offset = stream_buffer.Copy(device_addr, size, instance.UniformMinAlignment());
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@ -66,7 +66,8 @@ public:
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u32 BindIndexBuffer(bool& is_indexed, u32 index_offset);
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/// Obtains a buffer for the specified region.
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[[nodiscard]] std::pair<Buffer*, u32> ObtainBuffer(VAddr gpu_addr, u32 size, bool is_written);
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[[nodiscard]] std::pair<Buffer*, u32> ObtainBuffer(VAddr gpu_addr, u32 size, bool is_written,
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bool is_texel_buffer = false);
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/// Obtains a temporary buffer for usage in texture cache.
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[[nodiscard]] std::pair<const Buffer*, u32> ObtainTempBuffer(VAddr gpu_addr, u32 size);
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@ -171,7 +171,7 @@ bool ComputePipeline::BindResources(VideoCore::BufferCache& buffer_cache,
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}
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const u32 alignment = instance.TexelBufferMinAlignment();
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const auto [vk_buffer, offset] =
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buffer_cache.ObtainBuffer(address, size, desc.is_written);
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buffer_cache.ObtainBuffer(address, size, desc.is_written, true);
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const u32 fmt_stride = AmdGpu::NumBits(vsharp.GetDataFmt()) >> 3;
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ASSERT_MSG(fmt_stride == vsharp.GetStride(),
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"Texel buffer stride must match format stride");
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@ -412,7 +412,7 @@ void GraphicsPipeline::BindResources(const Liverpool::Regs& regs,
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const u32 size = vsharp.GetSize();
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const u32 alignment = instance.TexelBufferMinAlignment();
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const auto [vk_buffer, offset] =
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buffer_cache.ObtainBuffer(address, size, tex_buffer.is_written);
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buffer_cache.ObtainBuffer(address, size, tex_buffer.is_written, true);
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const u32 fmt_stride = AmdGpu::NumBits(vsharp.GetDataFmt()) >> 3;
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ASSERT_MSG(fmt_stride == vsharp.GetStride(),
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"Texel buffer stride must match format stride");
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