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buffer: Don't leak texel buffers, blacklist stream buffer with texel buffers

This commit is contained in:
IndecisiveTurtle 2024-08-30 00:25:04 +03:00
parent 6fbbe3d79b
commit cf706f8cc7
6 changed files with 11 additions and 9 deletions
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6
src/video_core/buffer_cache/buffer.cpp
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@ -119,7 +119,7 @@ vk::BufferView Buffer::View(u32 offset, u32 size, bool is_written, AmdGpu::DataF
dfmt == view.dfmt && nfmt == view.nfmt; dfmt == view.dfmt && nfmt == view.nfmt;
})}; })};
if (it != views.end()) { if (it != views.end()) {
return it->handle; return *it->handle;
} }
const vk::BufferUsageFlags2CreateInfoKHR usage_flags = { const vk::BufferUsageFlags2CreateInfoKHR usage_flags = {
.usage = is_written ? vk::BufferUsageFlagBits2KHR::eStorageTexelBuffer .usage = is_written ? vk::BufferUsageFlagBits2KHR::eStorageTexelBuffer
@ -138,9 +138,9 @@ vk::BufferView Buffer::View(u32 offset, u32 size, bool is_written, AmdGpu::DataF
.is_written = is_written, .is_written = is_written,
.dfmt = dfmt, .dfmt = dfmt,
.nfmt = nfmt, .nfmt = nfmt,
.handle = instance->GetDevice().createBufferView(view_ci), .handle = instance->GetDevice().createBufferViewUnique(view_ci),
}); });
return views.back().handle; return *views.back().handle;
} }
constexpr u64 WATCHES_INITIAL_RESERVE = 0x4000; constexpr u64 WATCHES_INITIAL_RESERVE = 0x4000;

2
src/video_core/buffer_cache/buffer.h
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@ -134,7 +134,7 @@ public:
bool is_written; bool is_written;
AmdGpu::DataFormat dfmt; AmdGpu::DataFormat dfmt;
AmdGpu::NumberFormat nfmt; AmdGpu::NumberFormat nfmt;
vk::BufferView handle; vk::UniqueBufferView handle;
}; };
std::vector<BufferView> views; std::vector<BufferView> views;
}; };

5
src/video_core/buffer_cache/buffer_cache.cpp
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@ -228,11 +228,12 @@ u32 BufferCache::BindIndexBuffer(bool& is_indexed, u32 index_offset) {
return regs.num_indices; return regs.num_indices;
} }
std::pair<Buffer*, u32> BufferCache::ObtainBuffer(VAddr device_addr, u32 size, bool is_written) { std::pair<Buffer*, u32> BufferCache::ObtainBuffer(VAddr device_addr, u32 size, bool is_written,
bool is_texel_buffer) {
std::scoped_lock lk{mutex}; std::scoped_lock lk{mutex};
static constexpr u64 StreamThreshold = CACHING_PAGESIZE; static constexpr u64 StreamThreshold = CACHING_PAGESIZE;
const bool is_gpu_dirty = memory_tracker.IsRegionGpuModified(device_addr, size); const bool is_gpu_dirty = memory_tracker.IsRegionGpuModified(device_addr, size);
if (!is_written && size < StreamThreshold && !is_gpu_dirty) { if (!is_written && !is_texel_buffer && size <= StreamThreshold && !is_gpu_dirty) {
// For small uniform buffers that have not been modified by gpu // For small uniform buffers that have not been modified by gpu
// use device local stream buffer to reduce renderpass breaks. // use device local stream buffer to reduce renderpass breaks.
const u64 offset = stream_buffer.Copy(device_addr, size, instance.UniformMinAlignment()); const u64 offset = stream_buffer.Copy(device_addr, size, instance.UniformMinAlignment());

3
src/video_core/buffer_cache/buffer_cache.h
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@ -66,7 +66,8 @@ public:
u32 BindIndexBuffer(bool& is_indexed, u32 index_offset); u32 BindIndexBuffer(bool& is_indexed, u32 index_offset);
/// Obtains a buffer for the specified region. /// Obtains a buffer for the specified region.
[[nodiscard]] std::pair<Buffer*, u32> ObtainBuffer(VAddr gpu_addr, u32 size, bool is_written); [[nodiscard]] std::pair<Buffer*, u32> ObtainBuffer(VAddr gpu_addr, u32 size, bool is_written,
bool is_texel_buffer = false);
/// Obtains a temporary buffer for usage in texture cache. /// Obtains a temporary buffer for usage in texture cache.
[[nodiscard]] std::pair<const Buffer*, u32> ObtainTempBuffer(VAddr gpu_addr, u32 size); [[nodiscard]] std::pair<const Buffer*, u32> ObtainTempBuffer(VAddr gpu_addr, u32 size);

2
src/video_core/renderer_vulkan/vk_compute_pipeline.cpp
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@ -171,7 +171,7 @@ bool ComputePipeline::BindResources(VideoCore::BufferCache& buffer_cache,
} }
const u32 alignment = instance.TexelBufferMinAlignment(); const u32 alignment = instance.TexelBufferMinAlignment();
const auto [vk_buffer, offset] = const auto [vk_buffer, offset] =
buffer_cache.ObtainBuffer(address, size, desc.is_written); buffer_cache.ObtainBuffer(address, size, desc.is_written, true);
const u32 fmt_stride = AmdGpu::NumBits(vsharp.GetDataFmt()) >> 3; const u32 fmt_stride = AmdGpu::NumBits(vsharp.GetDataFmt()) >> 3;
ASSERT_MSG(fmt_stride == vsharp.GetStride(), ASSERT_MSG(fmt_stride == vsharp.GetStride(),
"Texel buffer stride must match format stride"); "Texel buffer stride must match format stride");

2
src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
View File

@ -412,7 +412,7 @@ void GraphicsPipeline::BindResources(const Liverpool::Regs& regs,
const u32 size = vsharp.GetSize(); const u32 size = vsharp.GetSize();
const u32 alignment = instance.TexelBufferMinAlignment(); const u32 alignment = instance.TexelBufferMinAlignment();
const auto [vk_buffer, offset] = const auto [vk_buffer, offset] =
buffer_cache.ObtainBuffer(address, size, tex_buffer.is_written); buffer_cache.ObtainBuffer(address, size, tex_buffer.is_written, true);
const u32 fmt_stride = AmdGpu::NumBits(vsharp.GetDataFmt()) >> 3; const u32 fmt_stride = AmdGpu::NumBits(vsharp.GetDataFmt()) >> 3;
ASSERT_MSG(fmt_stride == vsharp.GetStride(), ASSERT_MSG(fmt_stride == vsharp.GetStride(),
"Texel buffer stride must match format stride"); "Texel buffer stride must match format stride");