renderer_vulkan: fixed buffers alignments

This commit is contained in:
psucien 2024-06-15 23:20:13 +02:00
parent 1e69f83d9e
commit be6f523b6e
5 changed files with 13 additions and 4 deletions

View File

@ -95,8 +95,9 @@ void ComputePipeline::BindResources(Core::MemoryManager* memory, StreamBuffer& s
const u32 size = vsharp.GetSize(); const u32 size = vsharp.GetSize();
const VAddr addr = vsharp.base_address.Value(); const VAddr addr = vsharp.base_address.Value();
texture_cache.OnCpuWrite(addr); texture_cache.OnCpuWrite(addr);
const u32 offset = const u32 offset = staging.Copy(addr, size,
staging.Copy(addr, size, buffer.is_storage ? 4 : instance.UniformMinAlignment()); buffer.is_storage ? instance.StorageMinAlignment()
: instance.UniformMinAlignment());
// const auto [vk_buffer, offset] = memory->GetVulkanBuffer(addr); // const auto [vk_buffer, offset] = memory->GetVulkanBuffer(addr);
buffer_infos.emplace_back(staging.Handle(), offset, size); buffer_infos.emplace_back(staging.Handle(), offset, size);
set_writes.push_back({ set_writes.push_back({

View File

@ -327,7 +327,8 @@ void GraphicsPipeline::BindResources(Core::MemoryManager* memory, StreamBuffer&
const auto vsharp = stage.ReadUd<AmdGpu::Buffer>(buffer.sgpr_base, buffer.dword_offset); const auto vsharp = stage.ReadUd<AmdGpu::Buffer>(buffer.sgpr_base, buffer.dword_offset);
const u32 size = vsharp.GetSize(); const u32 size = vsharp.GetSize();
const u32 offset = staging.Copy(vsharp.base_address.Value(), size, const u32 offset = staging.Copy(vsharp.base_address.Value(), size,
buffer.is_storage ? 4 : instance.UniformMinAlignment()); buffer.is_storage ? instance.StorageMinAlignment()
: instance.UniformMinAlignment());
buffer_infos.emplace_back(staging.Handle(), offset, size); buffer_infos.emplace_back(staging.Handle(), offset, size);
set_writes.push_back({ set_writes.push_back({
.dstSet = VK_NULL_HANDLE, .dstSet = VK_NULL_HANDLE,

View File

@ -213,6 +213,7 @@ bool Instance::CreateDevice() {
}, },
vk::PhysicalDeviceVulkan12Features{ vk::PhysicalDeviceVulkan12Features{
.scalarBlockLayout = true, .scalarBlockLayout = true,
.uniformBufferStandardLayout = true,
.hostQueryReset = true, .hostQueryReset = true,
.timelineSemaphore = true, .timelineSemaphore = true,
}, },

View File

@ -169,6 +169,11 @@ public:
return properties.limits.minUniformBufferOffsetAlignment; return properties.limits.minUniformBufferOffsetAlignment;
} }
/// Returns the minimum required alignment for storage buffers
vk::DeviceSize StorageMinAlignment() const {
return properties.limits.minStorageBufferOffsetAlignment;
}
/// Returns the minimum alignemt required for accessing host-mapped device memory /// Returns the minimum alignemt required for accessing host-mapped device memory
vk::DeviceSize NonCoherentAtomSize() const { vk::DeviceSize NonCoherentAtomSize() const {
return properties.limits.nonCoherentAtomSize; return properties.limits.nonCoherentAtomSize;

View File

@ -315,7 +315,8 @@ bool TileManager::TryDetile(Image& image) {
return false; return false;
} }
const auto offset = staging.Copy(image.cpu_addr, image.info.guest_size_bytes, 4); const auto offset =
staging.Copy(image.cpu_addr, image.info.guest_size_bytes, instance.StorageMinAlignment());
image.Transit(vk::ImageLayout::eGeneral, vk::AccessFlagBits::eShaderWrite); image.Transit(vk::ImageLayout::eGeneral, vk::AccessFlagBits::eShaderWrite);
auto cmdbuf = scheduler.CommandBuffer(); auto cmdbuf = scheduler.CommandBuffer();