translator: Implemtn f32 to f16 convert
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@ -84,6 +84,9 @@ static PS4_SYSV_ABI void stack_chk_fail() {
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int PS4_SYSV_ABI sceKernelMunmap(void* addr, size_t len) {
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LOG_INFO(Kernel_Vmm, "addr = {}, len = {:#x}", fmt::ptr(addr), len);
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if (len == 0) {
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return ORBIS_OK;
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}
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auto* memory = Core::Memory::Instance();
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memory->UnmapMemory(std::bit_cast<VAddr>(addr), len);
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return SCE_OK;
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@ -6,8 +6,8 @@
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namespace Shader::Backend::SPIRV {
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void EmitBitCastU16F16(EmitContext&) {
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UNREACHABLE_MSG("SPIR-V Instruction");
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Id EmitBitCastU16F16(EmitContext& ctx, Id value) {
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return ctx.OpBitcast(ctx.U16, value);
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}
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Id EmitBitCastU32F32(EmitContext& ctx, Id value) {
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@ -259,4 +259,8 @@ Id EmitConvertU16U32(EmitContext& ctx, Id value) {
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return ctx.OpUConvert(ctx.U16, value);
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}
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Id EmitConvertU32U16(EmitContext& ctx, Id value) {
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return ctx.OpUConvert(ctx.U32[1], value);
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}
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} // namespace Shader::Backend::SPIRV
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@ -148,7 +148,7 @@ Id EmitSelectU64(EmitContext& ctx, Id cond, Id true_value, Id false_value);
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Id EmitSelectF16(EmitContext& ctx, Id cond, Id true_value, Id false_value);
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Id EmitSelectF32(EmitContext& ctx, Id cond, Id true_value, Id false_value);
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Id EmitSelectF64(EmitContext& ctx, Id cond, Id true_value, Id false_value);
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void EmitBitCastU16F16(EmitContext& ctx);
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Id EmitBitCastU16F16(EmitContext& ctx, Id value);
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Id EmitBitCastU32F32(EmitContext& ctx, Id value);
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void EmitBitCastU64F64(EmitContext& ctx);
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Id EmitBitCastF16U16(EmitContext& ctx, Id value);
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@ -349,6 +349,7 @@ Id EmitConvertF64U16(EmitContext& ctx, Id value);
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Id EmitConvertF64U32(EmitContext& ctx, Id value);
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Id EmitConvertF64U64(EmitContext& ctx, Id value);
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Id EmitConvertU16U32(EmitContext& ctx, Id value);
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Id EmitConvertU32U16(EmitContext& ctx, Id value);
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Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id bias_lc,
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Id offset);
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@ -371,6 +371,9 @@ void Translate(IR::Block* block, u32 block_base, std::span<const GcnInst> inst_l
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case Opcode::V_CVT_F32_F16:
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translator.V_CVT_F32_F16(inst);
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break;
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case Opcode::V_CVT_F16_F32:
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translator.V_CVT_F16_F32(inst);
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break;
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case Opcode::V_CVT_F32_UBYTE0:
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translator.V_CVT_F32_UBYTE(0, inst);
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break;
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@ -94,6 +94,7 @@ public:
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void V_MAC_F32(const GcnInst& inst);
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void V_CVT_PKRTZ_F16_F32(const GcnInst& inst);
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void V_CVT_F32_F16(const GcnInst& inst);
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void V_CVT_F16_F32(const GcnInst& inst);
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void V_MUL_F32(const GcnInst& inst);
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void V_CNDMASK_B32(const GcnInst& inst);
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void V_OR_B32(bool is_xor, const GcnInst& inst);
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@ -32,6 +32,12 @@ void Translator::V_CVT_F32_F16(const GcnInst& inst) {
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SetDst(inst.dst[0], ir.FPConvert(32, ir.BitCast<IR::F16>(src0l)));
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}
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void Translator::V_CVT_F16_F32(const GcnInst& inst) {
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const IR::F32 src0 = GetSrc(inst.src[0], true);
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const IR::F16 src0fp16 = ir.FPConvert(16, src0);
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SetDst(inst.dst[0], ir.UConvert(32, ir.BitCast<IR::U16>(src0fp16)));
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}
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void Translator::V_MUL_F32(const GcnInst& inst) {
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SetDst(inst.dst[0], ir.FPMul(GetSrc(inst.src[0], true), GetSrc(inst.src[1], true)));
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}
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@ -1228,7 +1228,13 @@ U16U32U64 IREmitter::UConvert(size_t result_bitsize, const U16U32U64& value) {
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case Type::U32:
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return Inst<U16>(Opcode::ConvertU16U32, value);
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}
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case 32:
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switch (value.Type()) {
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case Type::U16:
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return Inst<U32>(Opcode::ConvertU32U16, value);
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}
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}
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throw NotImplementedException("Conversion from {} to {} bits", value.Type(), result_bitsize);
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}
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@ -289,6 +289,7 @@ OPCODE(ConvertF64S32, F64, U32,
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OPCODE(ConvertF64U32, F64, U32, )
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OPCODE(ConvertF32U16, F32, U16, )
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OPCODE(ConvertU16U32, U16, U32, )
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OPCODE(ConvertU32U16, U32, U16, )
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// Image operations
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OPCODE(ImageSampleImplicitLod, F32x4, Opaque, Opaque, Opaque, Opaque, )
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