shader_recompiler: Add LDEXP
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af3bbc33e9
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91aed76920
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@ -129,7 +129,11 @@ public:
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const auto end = std::chrono::high_resolution_clock::now();
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const auto end = std::chrono::high_resolution_clock::now();
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const auto time =
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const auto time =
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std::chrono::duration_cast<std::chrono::microseconds>(end - start).count();
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std::chrono::duration_cast<std::chrono::microseconds>(end - start).count();
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if (status == std::cv_status::timeout) {
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*timeout = 0;
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} else {
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*timeout -= time;
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*timeout -= time;
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}
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return GetResult(status == std::cv_status::timeout);
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return GetResult(status == std::cv_status::timeout);
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}
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}
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};
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};
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@ -98,6 +98,10 @@ Id EmitFPExp2(EmitContext& ctx, Id value) {
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return ctx.OpExp2(ctx.F32[1], value);
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return ctx.OpExp2(ctx.F32[1], value);
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}
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}
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Id EmitFPLdexp(EmitContext& ctx, Id value, Id exp) {
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return ctx.OpLdexp(ctx.F32[1], value, exp);
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}
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Id EmitFPLog2(EmitContext& ctx, Id value) {
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Id EmitFPLog2(EmitContext& ctx, Id value) {
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return ctx.OpLog2(ctx.F32[1], value);
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return ctx.OpLog2(ctx.F32[1], value);
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}
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}
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@ -172,6 +172,7 @@ Id EmitFPNeg64(EmitContext& ctx, Id value);
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Id EmitFPSin(EmitContext& ctx, Id value);
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Id EmitFPSin(EmitContext& ctx, Id value);
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Id EmitFPCos(EmitContext& ctx, Id value);
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Id EmitFPCos(EmitContext& ctx, Id value);
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Id EmitFPExp2(EmitContext& ctx, Id value);
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Id EmitFPExp2(EmitContext& ctx, Id value);
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Id EmitFPLdexp(EmitContext& ctx, Id value, Id exp);
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Id EmitFPLog2(EmitContext& ctx, Id value);
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Id EmitFPLog2(EmitContext& ctx, Id value);
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Id EmitFPRecip32(EmitContext& ctx, Id value);
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Id EmitFPRecip32(EmitContext& ctx, Id value);
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Id EmitFPRecip64(EmitContext& ctx, Id value);
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Id EmitFPRecip64(EmitContext& ctx, Id value);
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@ -345,6 +345,9 @@ void Translate(IR::Block* block, std::span<const GcnInst> inst_list, Info& info)
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case Opcode::V_BFREV_B32:
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case Opcode::V_BFREV_B32:
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translator.V_BFREV_B32(inst);
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translator.V_BFREV_B32(inst);
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break;
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break;
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case Opcode::V_LDEXP_F32:
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translator.V_LDEXP_F32(inst);
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break;
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case Opcode::V_FRACT_F32:
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case Opcode::V_FRACT_F32:
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translator.V_FRACT_F32(inst);
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translator.V_FRACT_F32(inst);
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break;
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break;
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@ -133,6 +133,7 @@ public:
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void V_NOT_B32(const GcnInst& inst);
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void V_NOT_B32(const GcnInst& inst);
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void V_CVT_F32_UBYTE(u32 index, const GcnInst& inst);
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void V_CVT_F32_UBYTE(u32 index, const GcnInst& inst);
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void V_BFREV_B32(const GcnInst& inst);
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void V_BFREV_B32(const GcnInst& inst);
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void V_LDEXP_F32(const GcnInst& inst);
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// Vector Memory
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// Vector Memory
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void BUFFER_LOAD_FORMAT(u32 num_dwords, bool is_typed, const GcnInst& inst);
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void BUFFER_LOAD_FORMAT(u32 num_dwords, bool is_typed, const GcnInst& inst);
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@ -502,4 +502,10 @@ void Translator::V_BFREV_B32(const GcnInst& inst) {
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SetDst(inst.dst[0], ir.BitReverse(src0));
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SetDst(inst.dst[0], ir.BitReverse(src0));
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}
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}
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void Translator::V_LDEXP_F32(const GcnInst& inst) {
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const IR::F32 src0{GetSrc(inst.src[0], true)};
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const IR::U32 src1{GetSrc(inst.src[1])};
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SetDst(inst.dst[0], ir.FPLdexp(src0, src1));
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}
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} // namespace Shader::Gcn
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} // namespace Shader::Gcn
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@ -603,6 +603,10 @@ F32 IREmitter::FPExp2(const F32& value) {
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return Inst<F32>(Opcode::FPExp2, value);
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return Inst<F32>(Opcode::FPExp2, value);
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}
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}
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F32 IREmitter::FPLdexp(const F32& value, const U32& exp) {
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return Inst<F32>(Opcode::FPLdexp, value, exp);
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}
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F32 IREmitter::FPLog2(const F32& value) {
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F32 IREmitter::FPLog2(const F32& value) {
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return Inst<F32>(Opcode::FPLog2, value);
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return Inst<F32>(Opcode::FPLog2, value);
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}
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}
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@ -120,6 +120,7 @@ public:
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[[nodiscard]] F32 FPSin(const F32& value);
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[[nodiscard]] F32 FPSin(const F32& value);
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[[nodiscard]] F32 FPExp2(const F32& value);
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[[nodiscard]] F32 FPExp2(const F32& value);
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[[nodiscard]] F32 FPLog2(const F32& value);
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[[nodiscard]] F32 FPLog2(const F32& value);
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[[nodiscard]] F32 FPLdexp(const F32& value, const U32& exp);
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[[nodiscard]] F32F64 FPRecip(const F32F64& value);
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[[nodiscard]] F32F64 FPRecip(const F32F64& value);
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[[nodiscard]] F32F64 FPRecipSqrt(const F32F64& value);
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[[nodiscard]] F32F64 FPRecipSqrt(const F32F64& value);
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[[nodiscard]] F32 FPSqrt(const F32& value);
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[[nodiscard]] F32 FPSqrt(const F32& value);
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@ -148,6 +148,7 @@ OPCODE(FPRecipSqrt64, F64, F64,
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OPCODE(FPSqrt, F32, F32, )
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OPCODE(FPSqrt, F32, F32, )
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OPCODE(FPSin, F32, F32, )
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OPCODE(FPSin, F32, F32, )
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OPCODE(FPExp2, F32, F32, )
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OPCODE(FPExp2, F32, F32, )
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OPCODE(FPLdexp, F32, F32, U32, )
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OPCODE(FPCos, F32, F32, )
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OPCODE(FPCos, F32, F32, )
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OPCODE(FPLog2, F32, F32, )
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OPCODE(FPLog2, F32, F32, )
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OPCODE(FPSaturate32, F32, F32, )
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OPCODE(FPSaturate32, F32, F32, )
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@ -323,6 +323,11 @@ Liverpool::Task Liverpool::ProcessGraphics(std::span<const u32> dcb, std::span<c
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regs.index_base_address.base_addr_hi.Assign(index_base->addr_hi);
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regs.index_base_address.base_addr_hi.Assign(index_base->addr_hi);
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break;
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break;
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}
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}
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case PM4ItOpcode::IndexBufferSize: {
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const auto* index_size = reinterpret_cast<const PM4CmdDrawIndexBufferSize*>(header);
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regs.num_indices = index_size->num_indices;
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break;
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}
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case PM4ItOpcode::EventWrite: {
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case PM4ItOpcode::EventWrite: {
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// const auto* event = reinterpret_cast<const PM4CmdEventWrite*>(header);
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// const auto* event = reinterpret_cast<const PM4CmdEventWrite*>(header);
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break;
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break;
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@ -581,6 +581,11 @@ struct PM4CmdDrawIndexBase {
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u32 addr_hi;
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u32 addr_hi;
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};
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};
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struct PM4CmdDrawIndexBufferSize {
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PM4Type3Header header;
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u32 num_indices;
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};
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struct PM4CmdIndirectBuffer {
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struct PM4CmdIndirectBuffer {
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PM4Type3Header header;
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PM4Type3Header header;
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u32 ibase_lo; ///< Indirect buffer base address, must be 4 byte aligned
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u32 ibase_lo; ///< Indirect buffer base address, must be 4 byte aligned
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@ -392,6 +392,10 @@ vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat nu
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num_format == AmdGpu::NumberFormat::Float) {
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num_format == AmdGpu::NumberFormat::Float) {
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return vk::Format::eR16G16Sfloat;
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return vk::Format::eR16G16Sfloat;
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}
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}
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if (data_format == AmdGpu::DataFormat::Format16_16_16_16 &&
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num_format == AmdGpu::NumberFormat::Snorm) {
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return vk::Format::eR16G16B16A16Snorm;
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}
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UNREACHABLE_MSG("Unknown data_format={} and num_format={}", u32(data_format), u32(num_format));
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UNREACHABLE_MSG("Unknown data_format={} and num_format={}", u32(data_format), u32(num_format));
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}
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}
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@ -203,6 +203,10 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline() {
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DumpShader(code, hash, stage, "bin");
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DumpShader(code, hash, stage, "bin");
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}
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}
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if (hash == 0xcafe3773 || hash == 0xc6602df2) {
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return nullptr;
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}
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block_pool.ReleaseContents();
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block_pool.ReleaseContents();
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inst_pool.ReleaseContents();
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inst_pool.ReleaseContents();
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@ -321,12 +321,13 @@ void Image::Upload(vk::Buffer buffer, u64 offset) {
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Transit(vk::ImageLayout::eTransferDstOptimal, vk::AccessFlagBits::eTransferWrite);
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Transit(vk::ImageLayout::eTransferDstOptimal, vk::AccessFlagBits::eTransferWrite);
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// Copy to the image.
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// Copy to the image.
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const auto aspect = aspect_mask & vk::ImageAspectFlagBits::eStencil ? vk::ImageAspectFlagBits::eDepth : aspect_mask;
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const vk::BufferImageCopy image_copy = {
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const vk::BufferImageCopy image_copy = {
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.bufferOffset = offset,
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.bufferOffset = offset,
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.bufferRowLength = info.pitch,
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.bufferRowLength = info.pitch,
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.bufferImageHeight = info.size.height,
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.bufferImageHeight = info.size.height,
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.imageSubresource{
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.imageSubresource{
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.aspectMask = aspect_mask,
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.aspectMask = aspect,
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.mipLevel = 0,
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.mipLevel = 0,
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.baseArrayLayer = 0,
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.baseArrayLayer = 0,
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.layerCount = 1,
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.layerCount = 1,
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@ -134,13 +134,13 @@ ImageId TextureCache::FindImage(const ImageInfo& info, VAddr cpu_address, bool r
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image_id = slot_images.insert(instance, scheduler, info, cpu_address);
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image_id = slot_images.insert(instance, scheduler, info, cpu_address);
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RegisterImage(image_id);
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RegisterImage(image_id);
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} else {
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} else {
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image_id = image_ids.size() > 1 ? image_ids[1] : image_ids[0];
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image_id = image_ids[0];
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}
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}
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RegisterMeta(info, image_id);
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RegisterMeta(info, image_id);
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Image& image = slot_images[image_id];
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Image& image = slot_images[image_id];
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if (True(image.flags & ImageFlagBits::CpuModified)) {
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if (True(image.flags & ImageFlagBits::CpuModified) && refresh_on_create) {
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RefreshImage(image);
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RefreshImage(image);
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TrackImage(image, image_id);
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TrackImage(image, image_id);
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}
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}
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@ -193,7 +193,7 @@ ImageView& TextureCache::FindImageView(const AmdGpu::Image& desc, bool is_storag
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ImageView& TextureCache::RenderTarget(const AmdGpu::Liverpool::ColorBuffer& buffer,
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ImageView& TextureCache::RenderTarget(const AmdGpu::Liverpool::ColorBuffer& buffer,
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const AmdGpu::Liverpool::CbDbExtent& hint) {
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const AmdGpu::Liverpool::CbDbExtent& hint) {
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const ImageInfo info{buffer, hint};
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const ImageInfo info{buffer, hint};
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const ImageId image_id = FindImage(info, buffer.Address(), false);
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const ImageId image_id = FindImage(info, buffer.Address());
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Image& image = slot_images[image_id];
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Image& image = slot_images[image_id];
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image.flags &= ~ImageFlagBits::CpuModified;
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image.flags &= ~ImageFlagBits::CpuModified;
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