diff --git a/src/shader_recompiler/frontend/translate/vector_alu.cpp b/src/shader_recompiler/frontend/translate/vector_alu.cpp
index 088fafe5..ba98102a 100644
--- a/src/shader_recompiler/frontend/translate/vector_alu.cpp
+++ b/src/shader_recompiler/frontend/translate/vector_alu.cpp
@@ -353,22 +353,8 @@ void Translator::V_CNDMASK_B32(const GcnInst& inst) {
     const IR::U1 flag = inst.src[2].field == OperandField::ScalarGPR
                             ? ir.GetThreadBitScalarReg(flag_reg)
                             : ir.GetVcc();
-
-    // We can treat the instruction as integer most of the time, but when a source is
-    // a floating point constant we will force the other as float for better readability
-    // The other operand is also higly likely to be float as well.
-    const auto is_float_const = [](OperandField field) {
-        return field >= OperandField::ConstFloatPos_0_5 && field <= OperandField::ConstFloatNeg_4_0;
-    };
-    const bool has_flt_source =
-        is_float_const(inst.src[0].field) || is_float_const(inst.src[1].field);
-    if (has_flt_source) {
-        const IR::Value result = ir.Select(flag, GetSrc<IR::F32>(inst.src[1]), GetSrc<IR::F32>(inst.src[0]));
-        ir.SetVectorReg(dst_reg, IR::U32F32{result});
-    } else {
-        const IR::Value result = ir.Select(flag, GetSrc(inst.src[1]), GetSrc(inst.src[0]));
-        ir.SetVectorReg(dst_reg, IR::U32F32{result});
-    }
+    const IR::Value result = ir.Select(flag, GetSrc<IR::F32>(inst.src[1]), GetSrc<IR::F32>(inst.src[0]));
+    ir.SetVectorReg(dst_reg, IR::U32F32{result});
 }
 
 void Translator::V_OR_B32(bool is_xor, const GcnInst& inst) {