Fixup a few things
This commit is contained in:
parent
58dcd6473d
commit
7e7fa4c701
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@ -14,6 +14,12 @@
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namespace Common {
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std::string ToLower(std::string str) {
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std::transform(str.begin(), str.end(), str.begin(),
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[](unsigned char c) { return static_cast<char>(std::tolower(c)); });
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return str;
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}
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std::vector<std::string> SplitString(const std::string& str, char delimiter) {
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std::istringstream iss(str);
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std::vector<std::string> output(1);
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@ -9,6 +9,9 @@
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namespace Common {
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/// Make a string lowercase
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[[nodiscard]] std::string ToLower(std::string str);
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std::vector<std::string> SplitString(const std::string& str, char delimiter);
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#ifdef _WIN32
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@ -2,6 +2,7 @@
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// SPDX-License-Identifier: GPL-2.0-or-later
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#include <algorithm>
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#include "common/string_util.h"
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#include "core/file_sys/fs.h"
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namespace Core::FileSys {
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@ -41,12 +42,6 @@ std::string MntPoints::GetHostDirectory(const std::string& guest_directory) {
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return "";
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}
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std::string ToLower(std::string str) {
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std::transform(str.begin(), str.end(), str.begin(),
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[](unsigned char c) { return static_cast<char>(std::tolower(c)); });
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return str;
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}
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std::string MntPoints::GetHostFile(const std::string& guest_file) {
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std::scoped_lock lock{m_mutex};
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@ -61,9 +56,9 @@ std::string MntPoints::GetHostFile(const std::string& guest_file) {
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#ifndef _WIN64
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const std::filesystem::path path{host_path};
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if (!std::filesystem::exists(path)) {
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const auto filename = ToLower(path.filename());
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const auto filename = Common::ToLower(path.filename());
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for (const auto& file : std::filesystem::directory_iterator(path.parent_path())) {
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const auto exist_filename = ToLower(file.path().filename());
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const auto exist_filename = Common::ToLower(file.path().filename());
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if (filename == exist_filename) {
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return file.path();
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}
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@ -344,8 +344,8 @@ s32 PS4_SYSV_ABI sceGnmAddEqEvent(SceKernelEqueue eq, u64 id, void* udata) {
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}
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int PS4_SYSV_ABI sceGnmAreSubmitsAllowed() {
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LOG_TRACE(Lib_GnmDriver, "called submission_lock = {}", submission_lock);
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return liverpool->IsGpuIdle();
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LOG_TRACE(Lib_GnmDriver, "called");
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return submission_lock == 0;
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}
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int PS4_SYSV_ABI sceGnmBeginWorkload() {
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@ -912,9 +912,9 @@ int PS4_SYSV_ABI sceGnmGetGpuBlockStatus() {
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return ORBIS_OK;
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}
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u64 PS4_SYSV_ABI sceGnmGetGpuCoreClockFrequency() {
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int PS4_SYSV_ABI sceGnmGetGpuCoreClockFrequency() {
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LOG_ERROR(Lib_GnmDriver, "(STUBBED) called");
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return 0x800000000;
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return ORBIS_OK;
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}
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int PS4_SYSV_ABI sceGnmGetGpuInfoStatus() {
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@ -1930,10 +1930,8 @@ s32 PS4_SYSV_ABI sceGnmSubmitCommandBuffers(u32 count, const u32* dcb_gpu_addrs[
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}
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}
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LOG_INFO(Lib_GnmDriver, "called submission_lock = {}", submission_lock);
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if (submission_lock != 0) {
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liverpool->WaitGpuIdle();
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LOG_INFO(Lib_GnmDriver, "Done waiting for GPU");
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// Suspend logic goes here
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@ -85,7 +85,7 @@ int PS4_SYSV_ABI sceGnmGetDebugTimestamp();
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int PS4_SYSV_ABI sceGnmGetEqEventType();
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int PS4_SYSV_ABI sceGnmGetEqTimeStamp();
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int PS4_SYSV_ABI sceGnmGetGpuBlockStatus();
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u64 PS4_SYSV_ABI sceGnmGetGpuCoreClockFrequency();
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int PS4_SYSV_ABI sceGnmGetGpuCoreClockFrequency();
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int PS4_SYSV_ABI sceGnmGetGpuInfoStatus();
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int PS4_SYSV_ABI sceGnmGetLastWaitedAddress();
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int PS4_SYSV_ABI sceGnmGetNumTcaUnits();
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@ -75,7 +75,7 @@ int PS4_SYSV_ABI sceKernelOpen(const char* path, int flags, u16 mode) {
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file->m_host_name = mnt->GetHostFile(file->m_guest_name);
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if (read) {
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file->f.Open(file->m_host_name, Common::FS::FileAccessMode::Read);
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} else if (write && create) {
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} else if (write && create && truncate) {
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file->f.Open(file->m_host_name, Common::FS::FileAccessMode::Write);
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} else if (write && create && append) { // CUSA04729 (appends app0/shaderlist.txt)
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file->f.Open(file->m_host_name, Common::FS::FileAccessMode::Append);
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@ -90,7 +90,7 @@ int PS4_SYSV_ABI sceKernelOpen(const char* path, int flags, u16 mode) {
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}
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if (!file->f.IsOpen()) {
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h->DeleteHandle(handle);
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return SCE_KERNEL_ERROR_ENOENT;
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return SCE_KERNEL_ERROR_EACCES;
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}
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}
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file->is_opened = true;
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@ -110,13 +110,10 @@ int PS4_SYSV_ABI sceKernelMapNamedDirectMemory(void** addr, u64 len, int prot, i
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}
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}
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VAddr in_addr = reinterpret_cast<VAddr>(*addr);
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const VAddr in_addr = reinterpret_cast<VAddr>(*addr);
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const auto mem_prot = static_cast<Core::MemoryProt>(prot);
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const auto map_flags = static_cast<Core::MemoryMapFlags>(flags);
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auto* memory = Core::Memory::Instance();
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if (False(map_flags & Core::MemoryMapFlags::Fixed) && in_addr == 0) {
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//in_addr = 0x880000000;
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}
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return memory->MapMemory(addr, in_addr, len, mem_prot, map_flags, Core::VMAType::Direct, "",
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false, directMemoryStart, alignment);
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}
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@ -146,13 +143,10 @@ s32 PS4_SYSV_ABI sceKernelMapNamedFlexibleMemory(void** addr_in_out, std::size_t
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return ORBIS_KERNEL_ERROR_EFAULT;
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}
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VAddr in_addr = reinterpret_cast<VAddr>(*addr_in_out);
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const VAddr in_addr = reinterpret_cast<VAddr>(*addr_in_out);
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const auto mem_prot = static_cast<Core::MemoryProt>(prot);
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const auto map_flags = static_cast<Core::MemoryMapFlags>(flags);
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auto* memory = Core::Memory::Instance();
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if (False(map_flags & Core::MemoryMapFlags::Fixed) && in_addr == 0) {
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//in_addr = 0x880000000;
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}
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const int ret = memory->MapMemory(addr_in_out, in_addr, len, mem_prot, map_flags,
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Core::VMAType::Flexible, name);
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@ -4,8 +4,8 @@
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#include <mutex>
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#include <thread>
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#include <semaphore.h>
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#include "common/assert.h"
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#include "common/alignment.h"
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#include "common/assert.h"
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#include "common/error.h"
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#include "common/logging/log.h"
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#include "common/singleton.h"
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@ -67,7 +67,6 @@ int PS4_SYSV_ABI scePthreadAttrInit(ScePthreadAttr* attr) {
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SceKernelSchedParam param{};
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param.sched_priority = 700;
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result = pthread_attr_setstacksize(&(*attr)->pth_attr, 2_MB);
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result = (result == 0 ? scePthreadAttrSetinheritsched(attr, 4) : result);
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result = (result == 0 ? scePthreadAttrSetschedparam(attr, ¶m) : result);
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result = (result == 0 ? scePthreadAttrSetschedpolicy(attr, SCHED_OTHER) : result);
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@ -926,10 +925,6 @@ int PS4_SYSV_ABI scePthreadCreate(ScePthread* thread, const ScePthreadAttr* attr
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attr = g_pthread_cxt->GetDefaultAttr();
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}
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if (name != nullptr && std::string_view(name) == "RenderMixThread") {
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printf("bad\n");
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}
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*thread = pthread_pool->Create();
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if ((*thread)->attr != nullptr) {
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@ -986,8 +981,9 @@ ScePthread PThreadPool::Create() {
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auto* ret = new PthreadInternal{};
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#else
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static u8* hint_address = reinterpret_cast<u8*>(0x7FFFFC000ULL);
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auto* ret = reinterpret_cast<PthreadInternal*>(mmap(hint_address, sizeof(PthreadInternal),
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PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0));
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auto* ret = reinterpret_cast<PthreadInternal*>(
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mmap(hint_address, sizeof(PthreadInternal), PROT_READ | PROT_WRITE,
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MAP_PRIVATE | MAP_ANONYMOUS | MAP_FIXED, -1, 0));
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hint_address += Common::AlignUp(sizeof(PthreadInternal), 4_KB);
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#endif
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@ -42,7 +42,7 @@ struct wrapper_impl<name, PS4_SYSV_ABI R (*)(Args...), f> {
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template <StringLiteral name, class F, F f>
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constexpr auto wrapper = wrapper_impl<name, F, f>::wrap;
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//#define W(foo) wrapper<#foo, decltype(&foo), foo>
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// #define W(foo) wrapper<#foo, decltype(&foo), foo>
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#define W(foo) foo
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#define LIB_FUNCTION(nid, lib, libversion, mod, moduleVersionMajor, moduleVersionMinor, function) \
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@ -10,7 +10,6 @@
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#include <arpa/inet.h>
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#endif
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#include <thread>
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#include <common/assert.h>
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#include "common/logging/log.h"
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#include "core/libraries/error_codes.h"
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@ -60,7 +59,6 @@ int PS4_SYSV_ABI sce_net_in6addr_nodelocal_allnodes() {
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}
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OrbisNetId PS4_SYSV_ABI sceNetAccept(OrbisNetId s, OrbisNetSockaddr* addr, u32* paddrlen) {
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std::this_thread::sleep_for(std::chrono::seconds(60));
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LOG_ERROR(Lib_Net, "(STUBBED) called");
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return ORBIS_OK;
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}
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@ -561,7 +559,7 @@ int PS4_SYSV_ABI sceNetEpollDestroy() {
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}
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int PS4_SYSV_ABI sceNetEpollWait() {
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//LOG_ERROR(Lib_Net, "(STUBBED) called");
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LOG_ERROR(Lib_Net, "(STUBBED) called");
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return ORBIS_OK;
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}
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@ -356,7 +356,8 @@ s32 saveDataMount(u32 user_id, std::string dir_name, u32 mount_mode,
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case ORBIS_SAVE_DATA_MOUNT_MODE_CREATE:
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case ORBIS_SAVE_DATA_MOUNT_MODE_CREATE | ORBIS_SAVE_DATA_MOUNT_MODE_RDONLY:
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case ORBIS_SAVE_DATA_MOUNT_MODE_CREATE | ORBIS_SAVE_DATA_MOUNT_MODE_RDWR:
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case ORBIS_SAVE_DATA_MOUNT_MODE_CREATE | ORBIS_SAVE_DATA_MOUNT_MODE_RDWR | ORBIS_SAVE_DATA_MOUNT_MODE_DESTRUCT_OFF:
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case ORBIS_SAVE_DATA_MOUNT_MODE_CREATE | ORBIS_SAVE_DATA_MOUNT_MODE_RDWR |
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ORBIS_SAVE_DATA_MOUNT_MODE_DESTRUCT_OFF:
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case ORBIS_SAVE_DATA_MOUNT_MODE_CREATE | ORBIS_SAVE_DATA_MOUNT_MODE_RDWR |
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ORBIS_SAVE_DATA_MOUNT_MODE_COPY_ICON:
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case ORBIS_SAVE_DATA_MOUNT_MODE_CREATE | ORBIS_SAVE_DATA_MOUNT_MODE_DESTRUCT_OFF |
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@ -61,12 +61,7 @@ int PS4_SYSV_ABI sceMsgDialogUpdateStatus() {
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return ORBIS_OK;
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}
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int PS4_SYSV_ABI sceImeDialogGetStatus() {
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return 1;
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}
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void RegisterlibSceMsgDialog(Core::Loader::SymbolsResolver* sym) {
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LIB_FUNCTION("IADmD4tScBY", "libSceImeDialog", 1, "libSceImeDialog", 1, 1, sceImeDialogGetStatus);
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LIB_FUNCTION("HTrcDKlFKuM", "libSceMsgDialog", 1, "libSceMsgDialog", 1, 1, sceMsgDialogClose);
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LIB_FUNCTION("Lr8ovHH9l6A", "libSceMsgDialog", 1, "libSceMsgDialog", 1, 1,
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sceMsgDialogGetResult);
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@ -137,9 +137,8 @@ void Emulator::Run(const std::filesystem::path& file) {
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}
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void Emulator::LoadSystemModules(const std::filesystem::path& file) {
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constexpr std::array<SysModules, 7> ModulesToLoad{
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constexpr std::array<SysModules, 6> ModulesToLoad{
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{{"libSceNgs2.sprx", nullptr},
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{"libSceFiber.sprx", nullptr},
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{"libSceLibcInternal.sprx", &Libraries::LibcInternal::RegisterlibSceLibcInternal},
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{"libSceDiscMap.sprx", &Libraries::DiscMap::RegisterlibSceDiscMap},
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{"libSceRtc.sprx", &Libraries::Rtc::RegisterlibSceRtc},
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@ -81,17 +81,13 @@ Id EmitImageFetch(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id of
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const Id image = ctx.OpLoad(texture.image_type, texture.id);
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const Id result_type = texture.data_types->Get(4);
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if (Sirit::ValidId(lod)) {
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return ctx.OpBitcast(ctx.F32[4], ctx.OpImageFetch(result_type, image, coords, spv::ImageOperandsMask::Lod, lod));
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return ctx.OpBitcast(ctx.F32[4], ctx.OpImageFetch(result_type, image, coords,
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spv::ImageOperandsMask::Lod, lod));
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} else {
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return ctx.OpBitcast(ctx.F32[4], ctx.OpImageFetch(result_type, image, coords));
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}
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}
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Id EmitImageFetchU32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id offset, Id lod,
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Id ms) {
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return Id{};
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}
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Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, u32 handle, Id lod, bool skip_mips) {
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const auto& texture = ctx.images[handle & 0xFFFF];
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const Id image = ctx.OpLoad(texture.image_type, texture.id);
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@ -359,8 +359,6 @@ Id EmitImageGatherDref(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords,
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const IR::Value& offset, const IR::Value& offset2, Id dref);
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Id EmitImageFetch(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id offset, Id lod,
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Id ms);
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Id EmitImageFetchU32(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id offset, Id lod,
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Id ms);
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Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, u32 handle, Id lod, bool skip_mips);
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Id EmitImageQueryLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords);
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Id EmitImageGradient(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,
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@ -231,10 +231,10 @@ void EmitContext::DefineOutputs(const Info& info) {
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f32_zero_value, f32_zero_value};
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const Id type{TypeArray(F32[1], ConstU32(8U))};
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const Id initializer{ConstantComposite(type, zero)};
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clip_distances = DefineVariable(type, spv::BuiltIn::ClipDistance,
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spv::StorageClass::Output, initializer);
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cull_distances = DefineVariable(type, spv::BuiltIn::CullDistance,
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spv::StorageClass::Output, initializer);
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clip_distances = DefineVariable(type, spv::BuiltIn::ClipDistance, spv::StorageClass::Output,
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initializer);
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cull_distances = DefineVariable(type, spv::BuiltIn::CullDistance, spv::StorageClass::Output,
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initializer);
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for (u32 i = 0; i < IR::NumParams; i++) {
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const IR::Attribute param{IR::Attribute::Param0 + i};
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if (!info.stores.GetAny(param)) {
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@ -74,7 +74,8 @@ public:
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}
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[[nodiscard]] Id DefineVariable(Id type, std::optional<spv::BuiltIn> builtin,
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spv::StorageClass storage_class, std::optional<Id> initializer = std::nullopt) {
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spv::StorageClass storage_class,
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std::optional<Id> initializer = std::nullopt) {
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const Id id{DefineVar(type, storage_class, initializer)};
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if (builtin) {
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Decorate(id, spv::Decoration::BuiltIn, *builtin);
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@ -633,7 +633,8 @@ private:
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if (!stmt.block->is_dummy) {
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const u32 start = stmt.block->begin_index;
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const u32 size = stmt.block->end_index - start + 1;
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Translate(current_block, stmt.block->begin, inst_list.subspan(start, size), info);
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Translate(current_block, stmt.block->begin, inst_list.subspan(start, size),
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info);
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}
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break;
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}
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@ -62,8 +62,7 @@ void Translator::S_BARRIER() {
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}
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void Translator::V_READFIRSTLANE_B32(const GcnInst& inst) {
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const IR::U32 src0{GetSrc(inst.src[0])};
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SetDst(inst.dst[0], src0);
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UNREACHABLE();
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}
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} // namespace Shader::Gcn
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@ -39,8 +39,9 @@ void Translator::S_BUFFER_LOAD_DWORD(int num_dwords, const GcnInst& inst) {
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}
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return ir.ShiftRightLogical(ir.GetScalarReg(IR::ScalarReg(smrd.offset)), ir.Imm32(2));
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}();
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const IR::Value vsharp = ir.CompositeConstruct(ir.GetScalarReg(sbase), ir.GetScalarReg(sbase + 1),
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ir.GetScalarReg(sbase + 2), ir.GetScalarReg(sbase + 3));
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const IR::Value vsharp =
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ir.CompositeConstruct(ir.GetScalarReg(sbase), ir.GetScalarReg(sbase + 1),
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ir.GetScalarReg(sbase + 2), ir.GetScalarReg(sbase + 3));
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IR::ScalarReg dst_reg{inst.dst[0].code};
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for (u32 i = 0; i < num_dwords; i++) {
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const IR::U32 index = ir.IAdd(dword_offset, ir.Imm32(i));
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@ -240,9 +240,9 @@ void Translator::EmitFetch(const GcnInst& inst) {
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attrib.instance_data);
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}
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const u32 num_components = AmdGpu::NumComponents(buffer.data_format);
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const u32 num_components = AmdGpu::NumComponents(buffer.GetDataFmt());
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info.vs_inputs.push_back({
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.fmt = buffer.num_format,
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.fmt = buffer.GetNumberFmt(),
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.binding = attrib.semantic,
|
||||
.num_components = std::min<u16>(attrib.num_elements, num_components),
|
||||
.sgpr_base = attrib.sgpr_base,
|
||||
|
|
|
@ -518,10 +518,7 @@ void Translator::V_CVT_FLR_I32_F32(const GcnInst& inst) {
|
|||
}
|
||||
|
||||
void Translator::V_CMP_CLASS_F32(const GcnInst& inst) {
|
||||
const IR::F32 src0{GetSrc(inst.src[0], true)};
|
||||
const IR::U32 src1{GetSrc(inst.src[1])};
|
||||
ir.SetVcc(ir.FPIsInf(src0));
|
||||
// TODO
|
||||
UNREACHABLE();
|
||||
}
|
||||
|
||||
} // namespace Shader::Gcn
|
||||
|
|
|
@ -250,8 +250,9 @@ void Translator::BUFFER_LOAD_FORMAT(u32 num_dwords, bool is_typed, const GcnInst
|
|||
info.nfmt.Assign(static_cast<AmdGpu::NumberFormat>(mtbuf.nfmt));
|
||||
}
|
||||
|
||||
const IR::Value handle = ir.CompositeConstruct(ir.GetScalarReg(sharp), ir.GetScalarReg(sharp + 1),
|
||||
ir.GetScalarReg(sharp + 2), ir.GetScalarReg(sharp + 3));
|
||||
const IR::Value handle =
|
||||
ir.CompositeConstruct(ir.GetScalarReg(sharp), ir.GetScalarReg(sharp + 1),
|
||||
ir.GetScalarReg(sharp + 2), ir.GetScalarReg(sharp + 3));
|
||||
const IR::Value value = ir.LoadBuffer(num_dwords, handle, address, info);
|
||||
const IR::VectorReg dst_reg{inst.src[1].code};
|
||||
if (num_dwords == 1) {
|
||||
|
@ -311,8 +312,9 @@ void Translator::BUFFER_STORE_FORMAT(u32 num_dwords, bool is_typed, const GcnIns
|
|||
ir.GetVectorReg<Shader::IR::F32>(src_reg + 3));
|
||||
break;
|
||||
}
|
||||
const IR::Value handle = ir.CompositeConstruct(ir.GetScalarReg(sharp), ir.GetScalarReg(sharp + 1),
|
||||
ir.GetScalarReg(sharp + 2), ir.GetScalarReg(sharp + 3));
|
||||
const IR::Value handle =
|
||||
ir.CompositeConstruct(ir.GetScalarReg(sharp), ir.GetScalarReg(sharp + 1),
|
||||
ir.GetScalarReg(sharp + 2), ir.GetScalarReg(sharp + 3));
|
||||
ir.StoreBuffer(num_dwords, handle, address, value, info);
|
||||
}
|
||||
|
||||
|
|
|
@ -272,8 +272,9 @@ Value IREmitter::LoadShared(int bit_size, bool is_signed, const U32& offset) {
|
|||
return Inst<U64>(Opcode::LoadSharedU64, offset);
|
||||
case 128:
|
||||
return Inst(Opcode::LoadSharedU128, offset);
|
||||
default:
|
||||
UNREACHABLE_MSG("Invalid bit size {}", bit_size);
|
||||
}
|
||||
UNREACHABLE_MSG("Invalid bit size {}", bit_size);
|
||||
}
|
||||
|
||||
void IREmitter::WriteShared(int bit_size, const Value& value, const U32& offset) {
|
||||
|
@ -294,7 +295,7 @@ void IREmitter::WriteShared(int bit_size, const Value& value, const U32& offset)
|
|||
Inst(Opcode::WriteSharedU128, offset, value);
|
||||
break;
|
||||
default:
|
||||
throw InvalidArgument("Invalid bit size {}", bit_size);
|
||||
UNREACHABLE_MSG("Invalid bit size {}", bit_size);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -293,7 +293,6 @@ OPCODE(ImageSampleDrefExplicitLod, F32, Opaq
|
|||
OPCODE(ImageGather, F32x4, Opaque, Opaque, Opaque, Opaque, )
|
||||
OPCODE(ImageGatherDref, F32x4, Opaque, Opaque, Opaque, Opaque, F32, )
|
||||
OPCODE(ImageFetch, F32x4, Opaque, Opaque, Opaque, U32, Opaque, )
|
||||
OPCODE(ImageFetchU32, U32x4, Opaque, Opaque, Opaque, U32, Opaque, )
|
||||
OPCODE(ImageQueryDimensions, U32x4, Opaque, U32, U1, )
|
||||
OPCODE(ImageQueryLod, F32x4, Opaque, Opaque, )
|
||||
OPCODE(ImageGradient, F32x4, Opaque, Opaque, Opaque, Opaque, Opaque, )
|
||||
|
|
|
@ -325,7 +325,7 @@ void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
|
|||
FoldWhenAllImmediates(inst, [](u32 base, u32 shift, u32 count) {
|
||||
if (static_cast<size_t>(shift) + static_cast<size_t>(count) > 32) {
|
||||
UNREACHABLE_MSG("Undefined result in {}({}, {}, {})", IR::Opcode::BitFieldUExtract,
|
||||
base, shift, count);
|
||||
base, shift, count);
|
||||
}
|
||||
return (base >> shift) & ((1U << count) - 1);
|
||||
});
|
||||
|
@ -337,7 +337,7 @@ void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
|
|||
const size_t right_shift{static_cast<size_t>(32 - count)};
|
||||
if (back_shift > 32 || left_shift >= 32 || right_shift >= 32) {
|
||||
UNREACHABLE_MSG("Undefined result in {}({}, {}, {})", IR::Opcode::BitFieldSExtract,
|
||||
base, shift, count);
|
||||
base, shift, count);
|
||||
}
|
||||
return static_cast<u32>((base << left_shift) >> right_shift);
|
||||
});
|
||||
|
@ -346,7 +346,7 @@ void ConstantPropagation(IR::Block& block, IR::Inst& inst) {
|
|||
FoldWhenAllImmediates(inst, [](u32 base, u32 insert, u32 offset, u32 bits) {
|
||||
if (bits >= 32 || offset >= 32) {
|
||||
UNREACHABLE_MSG("Undefined result in {}({}, {}, {}, {})",
|
||||
IR::Opcode::BitFieldInsert, base, insert, offset, bits);
|
||||
IR::Opcode::BitFieldInsert, base, insert, offset, bits);
|
||||
}
|
||||
return (base & ~(~(~0u << bits) << offset)) | (insert << offset);
|
||||
});
|
||||
|
|
|
@ -82,7 +82,6 @@ bool IsImageInstruction(const IR::Inst& inst) {
|
|||
case IR::Opcode::ImageSampleDrefExplicitLod:
|
||||
case IR::Opcode::ImageSampleDrefImplicitLod:
|
||||
case IR::Opcode::ImageFetch:
|
||||
case IR::Opcode::ImageFetchU32:
|
||||
case IR::Opcode::ImageGather:
|
||||
case IR::Opcode::ImageGatherDref:
|
||||
case IR::Opcode::ImageQueryDimensions:
|
||||
|
@ -222,19 +221,23 @@ SharpLocation TrackSharp(const IR::Inst* inst) {
|
|||
|
||||
static constexpr size_t MaxUboSize = 65536;
|
||||
|
||||
s32 TryHandleInlineCbuf(IR::Inst& inst, Info& info, Descriptors& descriptors, AmdGpu::Buffer& cbuf) {
|
||||
/**
|
||||
* Assert for the following pattern
|
||||
* s_getpc_b64 s[32:33]
|
||||
* s_add_u32 s32, <const>, s32
|
||||
* s_addc_u32 s33, 0, s33
|
||||
* s_mov_b32 s35, <const>
|
||||
* s_movk_i32 s34, <const>
|
||||
* buffer_load_format_xyz v[8:10], v1, s[32:35], 0 ...
|
||||
**/
|
||||
s32 TryHandleInlineCbuf(IR::Inst& inst, Info& info, Descriptors& descriptors,
|
||||
AmdGpu::Buffer& cbuf) {
|
||||
|
||||
// Assuming V# is in UD s[32:35]
|
||||
// The next pattern:
|
||||
// s_getpc_b64 s[32:33]
|
||||
// s_add_u32 s32, <const>, s32
|
||||
// s_addc_u32 s33, 0, s33
|
||||
// s_mov_b32 s35, <const>
|
||||
// s_movk_i32 s34, <const>
|
||||
// buffer_load_format_xyz v[8:10], v1, s[32:35], 0 ...
|
||||
// is used to define an inline constant buffer
|
||||
|
||||
IR::Inst* handle = inst.Arg(0).InstRecursive();
|
||||
IR::Inst* p0 = handle->Arg(0).InstRecursive();
|
||||
if (p0->GetOpcode() != IR::Opcode::IAdd32 || !p0->Arg(0).IsImmediate() || !p0->Arg(1).IsImmediate()) {
|
||||
if (p0->GetOpcode() != IR::Opcode::IAdd32 || !p0->Arg(0).IsImmediate() ||
|
||||
!p0->Arg(1).IsImmediate()) {
|
||||
return -1;
|
||||
}
|
||||
IR::Inst* p1 = handle->Arg(1).InstRecursive();
|
||||
|
@ -244,10 +247,12 @@ s32 TryHandleInlineCbuf(IR::Inst& inst, Info& info, Descriptors& descriptors, Am
|
|||
if (!handle->Arg(3).IsImmediate() || !handle->Arg(2).IsImmediate()) {
|
||||
return -1;
|
||||
}
|
||||
// We have found this pattern. Build the sharp and assign a binding to it.
|
||||
cbuf.raw0 = info.pgm_base + p0->Arg(0).U32() + p0->Arg(1).U32();
|
||||
cbuf.num_records = handle->Arg(2).U32();
|
||||
cbuf.raw11 = handle->Arg(3).U32();
|
||||
// We have found this pattern. Build the sharp.
|
||||
std::array<u64, 2> buffer;
|
||||
buffer[0] = info.pgm_base + p0->Arg(0).U32() + p0->Arg(1).U32();
|
||||
buffer[1] = handle->Arg(2).U32() | handle->Arg(3).U64() << 32;
|
||||
cbuf = std::bit_cast<AmdGpu::Buffer>(buffer);
|
||||
// Assign a binding to this sharp.
|
||||
return descriptors.Add(BufferResource{
|
||||
.sgpr_base = std::numeric_limits<u32>::max(),
|
||||
.dword_offset = 0,
|
||||
|
|
|
@ -329,10 +329,6 @@ struct PM4CmdEventWriteEop {
|
|||
*Address<u64>() = Common::FencedRDTSC();
|
||||
break;
|
||||
}
|
||||
case DataSelect::GpuClock64: {
|
||||
*Address<u64>() = 0;
|
||||
break;
|
||||
}
|
||||
default: {
|
||||
UNREACHABLE();
|
||||
}
|
||||
|
|
|
@ -21,27 +21,21 @@ enum class CompSwizzle : u32 {
|
|||
|
||||
// Table 8.5 Buffer Resource Descriptor [Sea Islands Series Instruction Set Architecture]
|
||||
struct Buffer {
|
||||
union {
|
||||
u64 raw0;
|
||||
BitField<0, 44, u64> base_address;
|
||||
BitField<48, 14, u64> stride;
|
||||
BitField<62, 1, u64> cache_swizzle;
|
||||
BitField<63, 1, u64> swizzle_enable;
|
||||
};
|
||||
u64 base_address : 44;
|
||||
u64 : 4;
|
||||
u64 stride : 14;
|
||||
u64 cache_swizzle : 1;
|
||||
u64 swizzle_enable : 1;
|
||||
u32 num_records;
|
||||
union {
|
||||
u32 raw11;
|
||||
BitField<0, 3, u32> dst_sel_x;
|
||||
BitField<3, 3, u32> dst_sel_y;
|
||||
BitField<6, 3, u32> dst_sel_z;
|
||||
BitField<9, 3, u32> dst_sel_w;
|
||||
BitField<0, 12, u32> dst_sel;
|
||||
BitField<12, 3, NumberFormat> num_format;
|
||||
BitField<15, 4, DataFormat> data_format;
|
||||
BitField<19, 2, u32> element_size;
|
||||
BitField<21, 2, u32> index_stride;
|
||||
BitField<23, 1, u32> add_tid_enable;
|
||||
};
|
||||
u32 dst_sel_x : 3;
|
||||
u32 dst_sel_y : 3;
|
||||
u32 dst_sel_z : 3;
|
||||
u32 dst_sel_w : 3;
|
||||
u32 num_format : 3;
|
||||
u32 data_format : 4;
|
||||
u32 element_size : 2;
|
||||
u32 index_stride : 2;
|
||||
u32 add_tid_enable : 1;
|
||||
|
||||
operator bool() const noexcept {
|
||||
return base_address != 0;
|
||||
|
@ -52,18 +46,27 @@ struct Buffer {
|
|||
}
|
||||
|
||||
CompSwizzle GetSwizzle(u32 comp) const noexcept {
|
||||
return static_cast<CompSwizzle>((dst_sel.Value() >> (comp * 3)) & 0x7);
|
||||
const std::array select{dst_sel_x, dst_sel_y, dst_sel_z, dst_sel_w};
|
||||
return static_cast<CompSwizzle>(select[comp]);
|
||||
}
|
||||
|
||||
NumberFormat GetNumberFmt() const noexcept {
|
||||
return static_cast<NumberFormat>(num_format);
|
||||
}
|
||||
|
||||
DataFormat GetDataFmt() const noexcept {
|
||||
return static_cast<DataFormat>(data_format);
|
||||
}
|
||||
|
||||
u32 GetStride() const noexcept {
|
||||
return stride == 0 ? 1U : stride.Value();
|
||||
return stride == 0 ? 1U : stride;
|
||||
}
|
||||
|
||||
u32 GetStrideElements(u32 element_size) const noexcept {
|
||||
if (stride == 0) {
|
||||
return 1U;
|
||||
}
|
||||
//ASSERT(stride % element_size == 0);
|
||||
ASSERT(stride % element_size == 0);
|
||||
return stride / element_size;
|
||||
}
|
||||
|
||||
|
@ -71,6 +74,7 @@ struct Buffer {
|
|||
return GetStride() * num_records;
|
||||
}
|
||||
};
|
||||
static_assert(sizeof(Buffer) == 16); // 128bits
|
||||
|
||||
enum class ImageType : u64 {
|
||||
Buffer = 0,
|
||||
|
|
|
@ -412,12 +412,10 @@ vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat nu
|
|||
num_format == AmdGpu::NumberFormat::Uint) {
|
||||
return vk::Format::eR32G32B32A32Uint;
|
||||
}
|
||||
if (data_format == AmdGpu::DataFormat::Format8 &&
|
||||
num_format == AmdGpu::NumberFormat::Sint) {
|
||||
if (data_format == AmdGpu::DataFormat::Format8 && num_format == AmdGpu::NumberFormat::Sint) {
|
||||
return vk::Format::eR8Sint;
|
||||
}
|
||||
if (data_format == AmdGpu::DataFormat::FormatBc1 &&
|
||||
num_format == AmdGpu::NumberFormat::Srgb) {
|
||||
if (data_format == AmdGpu::DataFormat::FormatBc1 && num_format == AmdGpu::NumberFormat::Srgb) {
|
||||
return vk::Format::eBc1RgbaSrgbBlock;
|
||||
}
|
||||
if (data_format == AmdGpu::DataFormat::Format16_16 &&
|
||||
|
|
|
@ -14,8 +14,8 @@ namespace Vulkan {
|
|||
|
||||
ComputePipeline::ComputePipeline(const Instance& instance_, Scheduler& scheduler_,
|
||||
vk::PipelineCache pipeline_cache, const Shader::Info* info_,
|
||||
vk::ShaderModule module)
|
||||
: instance{instance_}, scheduler{scheduler_}, info{*info_} {
|
||||
u64 compute_key_, vk::ShaderModule module)
|
||||
: instance{instance_}, scheduler{scheduler_}, compute_key{compute_key_}, info{*info_} {
|
||||
const vk::PipelineShaderStageCreateInfo shader_ci = {
|
||||
.stage = vk::ShaderStageFlagBits::eCompute,
|
||||
.module = module,
|
||||
|
@ -93,7 +93,7 @@ bool ComputePipeline::BindResources(Core::MemoryManager* memory, StreamBuffer& s
|
|||
for (const auto& buffer : info.buffers) {
|
||||
const auto vsharp = buffer.GetVsharp(info);
|
||||
const u32 size = vsharp.GetSize();
|
||||
const VAddr address = vsharp.base_address.Value();
|
||||
const VAddr address = vsharp.base_address;
|
||||
texture_cache.OnCpuWrite(address);
|
||||
const u32 offset = staging.Copy(address, size,
|
||||
buffer.is_storage ? instance.StorageMinAlignment()
|
||||
|
|
|
@ -24,7 +24,7 @@ class ComputePipeline {
|
|||
public:
|
||||
explicit ComputePipeline(const Instance& instance, Scheduler& scheduler,
|
||||
vk::PipelineCache pipeline_cache, const Shader::Info* info,
|
||||
vk::ShaderModule module);
|
||||
u64 compute_key, vk::ShaderModule module);
|
||||
~ComputePipeline();
|
||||
|
||||
[[nodiscard]] vk::Pipeline Handle() const noexcept {
|
||||
|
|
|
@ -47,7 +47,7 @@ GraphicsPipeline::GraphicsPipeline(const Instance& instance_, Scheduler& schedul
|
|||
attributes.push_back({
|
||||
.location = input.binding,
|
||||
.binding = input.binding,
|
||||
.format = LiverpoolToVK::SurfaceFormat(buffer.data_format, buffer.num_format),
|
||||
.format = LiverpoolToVK::SurfaceFormat(buffer.GetDataFmt(), buffer.GetNumberFmt()),
|
||||
.offset = 0,
|
||||
});
|
||||
bindings.push_back({
|
||||
|
@ -327,7 +327,7 @@ void GraphicsPipeline::BindResources(Core::MemoryManager* memory, StreamBuffer&
|
|||
for (const auto& stage : stages) {
|
||||
for (const auto& buffer : stage.buffers) {
|
||||
const auto vsharp = buffer.GetVsharp(stage);
|
||||
const VAddr address = vsharp.base_address.Value();
|
||||
const VAddr address = vsharp.base_address;
|
||||
const u32 size = vsharp.GetSize();
|
||||
const u32 offset = staging.Copy(address, size,
|
||||
buffer.is_storage ? instance.StorageMinAlignment()
|
||||
|
@ -419,8 +419,7 @@ void GraphicsPipeline::BindVertexBuffers(StreamBuffer& staging) const {
|
|||
continue;
|
||||
}
|
||||
guest_buffers.emplace_back(buffer);
|
||||
ranges.emplace_back(buffer.base_address.Value(),
|
||||
buffer.base_address.Value() + buffer.GetSize());
|
||||
ranges.emplace_back(buffer.base_address, buffer.base_address + buffer.GetSize());
|
||||
}
|
||||
std::ranges::sort(ranges, [](const BufferRange& lhv, const BufferRange& rhv) {
|
||||
return lhv.base_address < rhv.base_address;
|
||||
|
|
|
@ -74,12 +74,12 @@ Instance::Instance(Frontend::WindowSDL& window, s32 physical_device_index,
|
|||
|
||||
available_extensions = GetSupportedExtensions(physical_device);
|
||||
properties = physical_device.getProperties();
|
||||
CollectDeviceParameters();
|
||||
ASSERT_MSG(properties.apiVersion >= TargetVulkanApiVersion,
|
||||
"Vulkan {}.{} is required, but only {}.{} is supported by device!",
|
||||
VK_VERSION_MAJOR(TargetVulkanApiVersion), VK_VERSION_MINOR(TargetVulkanApiVersion),
|
||||
VK_VERSION_MAJOR(properties.apiVersion), VK_VERSION_MINOR(properties.apiVersion));
|
||||
|
||||
CollectDeviceParameters();
|
||||
CreateDevice();
|
||||
CollectToolingInfo();
|
||||
}
|
||||
|
@ -245,8 +245,7 @@ bool Instance::CreateDevice() {
|
|||
.workgroupMemoryExplicitLayoutScalarBlockLayout = true,
|
||||
.workgroupMemoryExplicitLayout8BitAccess = true,
|
||||
.workgroupMemoryExplicitLayout16BitAccess = true,
|
||||
}
|
||||
};
|
||||
}};
|
||||
|
||||
if (!color_write_en) {
|
||||
device_chain.unlink<vk::PhysicalDeviceColorWriteEnableFeaturesEXT>();
|
||||
|
|
|
@ -22,42 +22,46 @@ using Shader::VsOutput;
|
|||
|
||||
void BuildVsOutputs(Shader::Info& info, const AmdGpu::Liverpool::VsOutputControl& ctl) {
|
||||
const auto add_output = [&](VsOutput x, VsOutput y, VsOutput z, VsOutput w) {
|
||||
if (x != VsOutput::None || y != VsOutput::None ||
|
||||
z != VsOutput::None || w != VsOutput::None) {
|
||||
if (x != VsOutput::None || y != VsOutput::None || z != VsOutput::None ||
|
||||
w != VsOutput::None) {
|
||||
info.vs_outputs.emplace_back(Shader::VsOutputMap{x, y, z, w});
|
||||
}
|
||||
};
|
||||
// VS_OUT_MISC_VEC
|
||||
add_output(
|
||||
ctl.use_vtx_point_size ? VsOutput::PointSprite : VsOutput::None,
|
||||
ctl.use_vtx_edge_flag ? VsOutput::EdgeFlag :
|
||||
(ctl.use_vtx_gs_cut_flag ? VsOutput::GsCutFlag : VsOutput::None),
|
||||
ctl.use_vtx_kill_flag ? VsOutput::KillFlag :
|
||||
(ctl.use_vtx_render_target_idx ? VsOutput::GsMrtIndex : VsOutput::None),
|
||||
ctl.use_vtx_viewport_idx ? VsOutput::GsVpIndex : VsOutput::None
|
||||
);
|
||||
add_output(ctl.use_vtx_point_size ? VsOutput::PointSprite : VsOutput::None,
|
||||
ctl.use_vtx_edge_flag
|
||||
? VsOutput::EdgeFlag
|
||||
: (ctl.use_vtx_gs_cut_flag ? VsOutput::GsCutFlag : VsOutput::None),
|
||||
ctl.use_vtx_kill_flag
|
||||
? VsOutput::KillFlag
|
||||
: (ctl.use_vtx_render_target_idx ? VsOutput::GsMrtIndex : VsOutput::None),
|
||||
ctl.use_vtx_viewport_idx ? VsOutput::GsVpIndex : VsOutput::None);
|
||||
// VS_OUT_CCDIST0
|
||||
add_output(
|
||||
ctl.IsClipDistEnabled(0) ? VsOutput::ClipDist0 :
|
||||
(ctl.IsCullDistEnabled(0) ? VsOutput::CullDist0 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(1) ? VsOutput::ClipDist1 :
|
||||
(ctl.IsCullDistEnabled(1) ? VsOutput::CullDist1 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(2) ? VsOutput::ClipDist2 :
|
||||
(ctl.IsCullDistEnabled(2) ? VsOutput::CullDist2 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(3) ? VsOutput::ClipDist3 :
|
||||
(ctl.IsCullDistEnabled(3) ? VsOutput::CullDist3 : VsOutput::None)
|
||||
);
|
||||
add_output(ctl.IsClipDistEnabled(0)
|
||||
? VsOutput::ClipDist0
|
||||
: (ctl.IsCullDistEnabled(0) ? VsOutput::CullDist0 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(1)
|
||||
? VsOutput::ClipDist1
|
||||
: (ctl.IsCullDistEnabled(1) ? VsOutput::CullDist1 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(2)
|
||||
? VsOutput::ClipDist2
|
||||
: (ctl.IsCullDistEnabled(2) ? VsOutput::CullDist2 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(3)
|
||||
? VsOutput::ClipDist3
|
||||
: (ctl.IsCullDistEnabled(3) ? VsOutput::CullDist3 : VsOutput::None));
|
||||
// VS_OUT_CCDIST1
|
||||
add_output(
|
||||
ctl.IsClipDistEnabled(4) ? VsOutput::ClipDist4 :
|
||||
(ctl.IsCullDistEnabled(4) ? VsOutput::CullDist4 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(5) ? VsOutput::ClipDist5 :
|
||||
(ctl.IsCullDistEnabled(5) ? VsOutput::CullDist5 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(6) ? VsOutput::ClipDist6 :
|
||||
(ctl.IsCullDistEnabled(6) ? VsOutput::CullDist6 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(7) ? VsOutput::ClipDist7 :
|
||||
(ctl.IsCullDistEnabled(7) ? VsOutput::CullDist7 : VsOutput::None)
|
||||
);
|
||||
add_output(ctl.IsClipDistEnabled(4)
|
||||
? VsOutput::ClipDist4
|
||||
: (ctl.IsCullDistEnabled(4) ? VsOutput::CullDist4 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(5)
|
||||
? VsOutput::ClipDist5
|
||||
: (ctl.IsCullDistEnabled(5) ? VsOutput::CullDist5 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(6)
|
||||
? VsOutput::ClipDist6
|
||||
: (ctl.IsCullDistEnabled(6) ? VsOutput::CullDist6 : VsOutput::None),
|
||||
ctl.IsClipDistEnabled(7)
|
||||
? VsOutput::ClipDist7
|
||||
: (ctl.IsCullDistEnabled(7) ? VsOutput::CullDist7 : VsOutput::None));
|
||||
}
|
||||
|
||||
Shader::Info MakeShaderInfo(Shader::Stage stage, std::span<const u32, 16> user_data,
|
||||
|
@ -214,13 +218,13 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline() {
|
|||
// actual draw hence can skip pipeline creation.
|
||||
if (regs.color_control.mode == Liverpool::ColorControl::OperationMode::EliminateFastClear) {
|
||||
LOG_TRACE(Render_Vulkan, "FCE pass skipped");
|
||||
//return {};
|
||||
return {};
|
||||
}
|
||||
|
||||
if (regs.color_control.mode == Liverpool::ColorControl::OperationMode::FmaskDecompress) {
|
||||
// TODO: check for a valid MRT1 to promote the draw to the resolve pass.
|
||||
LOG_TRACE(Render_Vulkan, "FMask decompression pass skipped");
|
||||
//return {};
|
||||
return {};
|
||||
}
|
||||
|
||||
u32 binding{};
|
||||
|
@ -251,10 +255,6 @@ std::unique_ptr<GraphicsPipeline> PipelineCache::CreateGraphicsPipeline() {
|
|||
block_pool.ReleaseContents();
|
||||
inst_pool.ReleaseContents();
|
||||
|
||||
if (hash == 0x43ade46898f820e2 || hash == 0xbcf2be6c546ad35a) {
|
||||
return nullptr;
|
||||
}
|
||||
|
||||
// Recompile shader to IR.
|
||||
try {
|
||||
LOG_INFO(Render_Vulkan, "Compiling {} shader {:#x}", stage, hash);
|
||||
|
@ -314,7 +314,7 @@ std::unique_ptr<ComputePipeline> PipelineCache::CreateComputePipeline() {
|
|||
const auto name = fmt::format("cs_{:#x}", compute_key);
|
||||
Vulkan::SetObjectName(instance.GetDevice(), module, name);
|
||||
return std::make_unique<ComputePipeline>(instance, scheduler, *pipeline_cache,
|
||||
&program.info, module);
|
||||
&program.info, compute_key, module);
|
||||
} catch (const Shader::Exception& e) {
|
||||
UNREACHABLE_MSG("{}", e.what());
|
||||
return nullptr;
|
||||
|
|
|
@ -75,7 +75,8 @@ void Rasterizer::DispatchDirect() {
|
|||
}
|
||||
|
||||
try {
|
||||
const auto has_resources = pipeline->BindResources(memory, vertex_index_buffer, texture_cache);
|
||||
const auto has_resources =
|
||||
pipeline->BindResources(memory, vertex_index_buffer, texture_cache);
|
||||
if (!has_resources) {
|
||||
return;
|
||||
}
|
||||
|
@ -137,10 +138,6 @@ void Rasterizer::BeginRendering() {
|
|||
};
|
||||
texture_cache.TouchMeta(htile_address, false);
|
||||
state.num_depth_attachments++;
|
||||
} else {
|
||||
if (regs.depth_render_control.depth_compress_disable) {
|
||||
LOG_WARNING(Render_Vulkan, "No depth buffer bound with dcc");
|
||||
}
|
||||
}
|
||||
scheduler.BeginRendering(state);
|
||||
}
|
||||
|
|
|
@ -226,7 +226,7 @@ void StreamBuffer::WaitPendingOperations(u64 requested_upper_bound) {
|
|||
while (requested_upper_bound > wait_bound && wait_cursor < *invalidation_mark) {
|
||||
auto& watch = previous_watches[wait_cursor];
|
||||
wait_bound = watch.upper_bound;
|
||||
//scheduler.Wait(watch.tick);
|
||||
scheduler.Wait(watch.tick);
|
||||
++wait_cursor;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -221,9 +221,6 @@ Image::Image(const Vulkan::Instance& instance_, Vulkan::Scheduler& scheduler_,
|
|||
: instance{&instance_}, scheduler{&scheduler_}, info{info_},
|
||||
image{instance->GetDevice(), instance->GetAllocator()}, cpu_addr{cpu_addr},
|
||||
cpu_addr_end{cpu_addr + info.guest_size_bytes} {
|
||||
if (cpu_addr == 2990538752ULL) {
|
||||
printf("bad\n");
|
||||
}
|
||||
ASSERT(info.pixel_format != vk::Format::eUndefined);
|
||||
vk::ImageCreateFlags flags{vk::ImageCreateFlagBits::eMutableFormat |
|
||||
vk::ImageCreateFlagBits::eExtendedUsage};
|
||||
|
|
|
@ -77,9 +77,6 @@ ImageView::ImageView(const Vulkan::Instance& instance, const ImageViewInfo& info
|
|||
if (usage_override) {
|
||||
usage_ci.usage = usage_override.value();
|
||||
}
|
||||
if (image.info.type == vk::ImageType::e1D) {
|
||||
printf("bad\n");
|
||||
}
|
||||
// When sampling D32 texture from shader, the T# specifies R32 Float format so adjust it.
|
||||
vk::Format format = info.format;
|
||||
vk::ImageAspectFlags aspect = image.aspect_mask;
|
||||
|
|
|
@ -127,14 +127,14 @@ ImageId TextureCache::FindImage(const ImageInfo& info, VAddr cpu_address, bool r
|
|||
image_ids.push_back(image_id);
|
||||
});
|
||||
|
||||
//ASSERT_MSG(image_ids.size() <= 1, "Overlapping images not allowed!");
|
||||
ASSERT_MSG(image_ids.size() <= 1, "Overlapping images not allowed!");
|
||||
|
||||
ImageId image_id{};
|
||||
if (image_ids.empty()) {
|
||||
image_id = slot_images.insert(instance, scheduler, info, cpu_address);
|
||||
RegisterImage(image_id);
|
||||
} else {
|
||||
image_id = image_ids[image_ids.size() > 1 ? 1 : 0];
|
||||
image_id = image_ids[0];
|
||||
}
|
||||
|
||||
RegisterMeta(info, image_id);
|
||||
|
|
Loading…
Reference in New Issue