amdgpu: added ASC commands processor
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b8290ea521
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@ -12,7 +12,7 @@ namespace AmdGpu {
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static const char* dcb_task_name{"DCB_TASK"};
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static const char* dcb_task_name{"DCB_TASK"};
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static const char* ccb_task_name{"CCB_TASK"};
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static const char* ccb_task_name{"CCB_TASK"};
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static const char* asc_task_name{"ACB_TASK"};
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static const char* acb_task_name{"ACB_TASK"};
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std::array<u8, 48_KB> Liverpool::ConstantEngine::constants_heap;
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std::array<u8, 48_KB> Liverpool::ConstantEngine::constants_heap;
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@ -381,6 +381,8 @@ Liverpool::Task Liverpool::ProcessGraphics(std::span<const u32> dcb, std::span<c
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}
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}
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Liverpool::Task Liverpool::ProcessCompute(std::span<const u32> acb) {
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Liverpool::Task Liverpool::ProcessCompute(std::span<const u32> acb) {
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TracyFiberEnter(acb_task_name);
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while (!acb.empty()) {
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while (!acb.empty()) {
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const auto* header = reinterpret_cast<const PM4Header*>(acb.data());
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const auto* header = reinterpret_cast<const PM4Header*>(acb.data());
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const u32 type = header->type;
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const u32 type = header->type;
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@ -393,6 +395,69 @@ Liverpool::Task Liverpool::ProcessCompute(std::span<const u32> acb) {
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const PM4ItOpcode opcode = header->type3.opcode;
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const PM4ItOpcode opcode = header->type3.opcode;
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const auto* it_body = reinterpret_cast<const u32*>(header) + 1;
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const auto* it_body = reinterpret_cast<const u32*>(header) + 1;
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switch (opcode) {
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switch (opcode) {
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case PM4ItOpcode::Nop: {
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const auto* nop = reinterpret_cast<const PM4CmdNop*>(header);
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break;
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}
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case PM4ItOpcode::IndirectBuffer: {
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const auto* indirect_buffer = reinterpret_cast<const PM4CmdIndirectBuffer*>(header);
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auto task =
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ProcessCompute({indirect_buffer->Address<const u32>(), indirect_buffer->ib_size});
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while (!task.handle.done()) {
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task.handle.resume();
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TracyFiberLeave;
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co_yield {};
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TracyFiberEnter(acb_task_name);
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};
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break;
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}
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case PM4ItOpcode::AcquireMem: {
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break;
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}
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case PM4ItOpcode::SetShReg: {
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const auto* set_data = reinterpret_cast<const PM4CmdSetData*>(header);
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std::memcpy(®s.reg_array[ShRegWordOffset + set_data->reg_offset], header + 2,
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(count - 1) * sizeof(u32));
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break;
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}
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case PM4ItOpcode::DispatchDirect: {
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const auto* dispatch_direct = reinterpret_cast<const PM4CmdDispatchDirect*>(header);
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regs.cs_program.dim_x = dispatch_direct->dim_x;
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regs.cs_program.dim_y = dispatch_direct->dim_y;
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regs.cs_program.dim_z = dispatch_direct->dim_z;
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regs.cs_program.dispatch_initiator = dispatch_direct->dispatch_initiator;
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if (rasterizer && (regs.cs_program.dispatch_initiator & 1)) {
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rasterizer->DispatchDirect();
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}
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break;
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}
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case PM4ItOpcode::WriteData: {
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const auto* write_data = reinterpret_cast<const PM4CmdWriteData*>(header);
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ASSERT(write_data->dst_sel.Value() == 2 || write_data->dst_sel.Value() == 5);
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const u32 data_size = (header->type3.count.Value() - 2) * 4;
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if (!write_data->wr_one_addr.Value()) {
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std::memcpy(write_data->Address<void*>(), write_data->data, data_size);
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} else {
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UNREACHABLE();
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}
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break;
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}
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case PM4ItOpcode::WaitRegMem: {
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const auto* wait_reg_mem = reinterpret_cast<const PM4CmdWaitRegMem*>(header);
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ASSERT(wait_reg_mem->engine.Value() == PM4CmdWaitRegMem::Engine::Me);
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while (!wait_reg_mem->Test()) {
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TracyFiberLeave;
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co_yield {};
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TracyFiberEnter(acb_task_name);
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}
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break;
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}
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case PM4ItOpcode::ReleaseMem: {
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const auto* release_mem = reinterpret_cast<const PM4CmdReleaseMem*>(header);
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release_mem->SignalFence(Platform::InterruptId::Compute0RelMem); // <---
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break;
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}
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default:
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default:
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UNREACHABLE_MSG("Unknown PM4 type 3 opcode {:#x} with count {}",
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UNREACHABLE_MSG("Unknown PM4 type 3 opcode {:#x} with count {}",
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static_cast<u32>(opcode), count);
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static_cast<u32>(opcode), count);
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@ -401,7 +466,7 @@ Liverpool::Task Liverpool::ProcessCompute(std::span<const u32> acb) {
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acb = acb.subspan(header->type3.NumWords() + 1);
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acb = acb.subspan(header->type3.NumWords() + 1);
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}
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}
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return {}; // Not a coroutine yet
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TracyFiberLeave;
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}
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}
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void Liverpool::SubmitGfx(std::span<const u32> dcb, std::span<const u32> ccb) {
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void Liverpool::SubmitGfx(std::span<const u32> dcb, std::span<const u32> ccb) {
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