Gnmdriver: More functions (#410)

* libraries: gnmdriver: added `sceGnmGetGpuCoreClockFrequency`

* libraries: gnmdriver: `sceGnmSetVgtControl` added

* amdgpu: gpuclock64 in write eop packet

src/core/libraries/gnmdriver/gnmdriver.cpp

@@ -956,9 +956,9 @@ int PS4_SYSV_ABI sceGnmGetGpuBlockStatus() {
     return ORBIS_OK;
 }
 
-int PS4_SYSV_ABI sceGnmGetGpuCoreClockFrequency() {
-    LOG_DEBUG(Lib_GnmDriver, "(STUBBED) called");
-    return ORBIS_OK;
+u32 PS4_SYSV_ABI sceGnmGetGpuCoreClockFrequency() {
+    LOG_TRACE(Lib_GnmDriver, "called");
+    return Config::isNeoMode() ? 911'000'000 : 800'000'000;
 }
 
 int PS4_SYSV_ABI sceGnmGetGpuInfoStatus() {
@@ -1706,8 +1706,18 @@ int PS4_SYSV_ABI sceGnmSetupMipStatsReport() {
     return ORBIS_OK;
 }
 
-int PS4_SYSV_ABI sceGnmSetVgtControl() {
-    LOG_ERROR(Lib_GnmDriver, "(STUBBED) called");
+s32 PS4_SYSV_ABI sceGnmSetVgtControl(u32* cmdbuf, u32 size, u32 prim_group_sz_minus_one,
+                                     u32 partial_vs_wave_mode, u32 wd_switch_only_on_eop_mode) {
+    LOG_TRACE(Lib_GnmDriver, "called");
+
+    if (!cmdbuf || size != 3 || (prim_group_sz_minus_one >= 0x100) ||
+        ((wd_switch_only_on_eop_mode | partial_vs_wave_mode) >= 2)) {
+        return -1;
+    }
+
+    const u32 reg_value =
+        ((partial_vs_wave_mode & 1) << 0x10) | (prim_group_sz_minus_one & 0xffffu);
+    PM4CmdSetData::SetContextReg(cmdbuf, 0x2aau, reg_value); // IA_MULTI_VGT_PARAM
     return ORBIS_OK;
 }
 

src/core/libraries/gnmdriver/gnmdriver.h

@@ -85,7 +85,7 @@ int PS4_SYSV_ABI sceGnmGetDebugTimestamp();
 int PS4_SYSV_ABI sceGnmGetEqEventType();
 int PS4_SYSV_ABI sceGnmGetEqTimeStamp();
 int PS4_SYSV_ABI sceGnmGetGpuBlockStatus();
-int PS4_SYSV_ABI sceGnmGetGpuCoreClockFrequency();
+u32 PS4_SYSV_ABI sceGnmGetGpuCoreClockFrequency();
 int PS4_SYSV_ABI sceGnmGetGpuInfoStatus();
 int PS4_SYSV_ABI sceGnmGetLastWaitedAddress();
 int PS4_SYSV_ABI sceGnmGetNumTcaUnits();
@@ -161,7 +161,8 @@ int PS4_SYSV_ABI sceGnmSetResourceUserData();
 int PS4_SYSV_ABI sceGnmSetSpiEnableSqCounters();
 int PS4_SYSV_ABI sceGnmSetSpiEnableSqCountersForUnitInstance();
 int PS4_SYSV_ABI sceGnmSetupMipStatsReport();
-int PS4_SYSV_ABI sceGnmSetVgtControl();
+s32 PS4_SYSV_ABI sceGnmSetVgtControl(u32* cmdbuf, u32 size, u32 prim_group_sz_minus_one,
+                                     u32 partial_vs_wave_mode, u32 wd_switch_only_on_eop_mode);
 s32 PS4_SYSV_ABI sceGnmSetVsShader(u32* cmdbuf, u32 size, const u32* vs_regs, u32 shader_modifier);
 int PS4_SYSV_ABI sceGnmSetWaveLimitMultiplier();
 int PS4_SYSV_ABI sceGnmSetWaveLimitMultipliers();

src/video_core/amdgpu/pm4_cmds.h

@@ -282,6 +282,13 @@ enum class InterruptSelect : u32 {
     IrqUndocumented = 3,
 };
 
+static u64 GetGpuClock64() {
+    auto now = std::chrono::high_resolution_clock::now();
+    auto duration = now.time_since_epoch();
+    auto ticks = std::chrono::duration_cast<std::chrono::nanoseconds>(duration).count();
+    return static_cast<u64>(ticks);
+}
+
 struct PM4CmdEventWriteEop {
     PM4Type3Header header;
     union {
@@ -325,6 +332,10 @@ struct PM4CmdEventWriteEop {
             *Address<u64>() = DataQWord();
             break;
         }
+        case DataSelect::GpuClock64: {
+            *Address<u64>() = GetGpuClock64();
+            break;
+        }
         case DataSelect::PerfCounter: {
             *Address<u64>() = Common::FencedRDTSC();
             break;
@@ -652,13 +663,6 @@ struct PM4CmdReleaseMem {
         return data_lo | u64(data_hi) << 32;
     }
 
-    uint64_t GetGpuClock64() const {
-        auto now = std::chrono::high_resolution_clock::now();
-        auto duration = now.time_since_epoch();
-        auto ticks = std::chrono::duration_cast<std::chrono::nanoseconds>(duration).count();
-        return static_cast<uint64_t>(ticks);
-    }
-
     void SignalFence(Platform::InterruptId irq_id) const {
         switch (data_sel.Value()) {
         case DataSelect::Data32Low: {

src/video_core/amdgpu/pm4_opcodes.h

@@ -41,6 +41,7 @@ enum class PM4ItOpcode : u32 {
     CondIndirectBuffer = 0x3F,
     CopyData = 0x40,
     CommandProcessorDma = 0x41,
+    PfpSyncMe = 0x42,
     SurfaceSync = 0x43,
     CondWrite = 0x45,
     EventWrite = 0x46,