shader_recompiler: added `V_CMPX_GT_I32`
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459083528a
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@ -22,6 +22,11 @@ struct Compare {
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};
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static IR::Condition MakeCondition(Opcode opcode) {
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if (IsCmpxOpcode(opcode)) {
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ASSERT(opcode == Opcode::V_CMPX_NE_U32);
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return IR::Condition::Execnz;
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}
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switch (opcode) {
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case Opcode::S_CBRANCH_SCC0:
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return IR::Condition::Scc0;
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@ -37,7 +42,6 @@ static IR::Condition MakeCondition(Opcode opcode) {
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return IR::Condition::Execnz;
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case Opcode::S_AND_SAVEEXEC_B64:
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case Opcode::S_ANDN2_B64:
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case Opcode::V_CMPX_NE_U32:
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return IR::Condition::Execnz;
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default:
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return IR::Condition::True;
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@ -2194,6 +2194,20 @@ enum class Opcode : u32 {
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EXP = 0 + (u32)OpcodeMap::OP_MAP_EXP,
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};
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static constexpr bool IsCmpxOpcode(Opcode op) {
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if ((op >= Opcode::V_CMPX_F_F32 && op <= Opcode::V_CMPX_T_F32) ||
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(op >= Opcode::V_CMPX_F_F64 && op <= Opcode::V_CMPX_T_F64) ||
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(op >= Opcode::V_CMPSX_F_F32 && op <= Opcode::V_CMPSX_T_F32) ||
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(op >= Opcode::V_CMPSX_F_F64 && op <= Opcode::V_CMPSX_T_F64) ||
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(op >= Opcode::V_CMPX_F_I32 && op <= Opcode::V_CMPX_CLASS_F32) ||
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(op >= Opcode::V_CMPX_F_I64 && op <= Opcode::V_CMPX_CLASS_F64) ||
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(op >= Opcode::V_CMPX_F_U32 && op <= Opcode::V_CMPX_T_U32) ||
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(op >= Opcode::V_CMPX_F_U64 && op <= Opcode::V_CMPX_T_U64)) {
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return true;
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}
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return false;
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}
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enum class EncodingMask : u32 {
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MASK_9bit = 0x000001FFULL << 23,
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MASK_7bit = 0x0000007FULL << 25,
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@ -280,6 +280,8 @@ void Translator::EmitVectorAlu(const GcnInst& inst) {
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return V_CMP_U32(ConditionOp::GT, true, false, inst);
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case Opcode::V_CMP_LT_I32:
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return V_CMP_U32(ConditionOp::LT, true, false, inst);
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case Opcode::V_CMPX_GT_I32:
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return V_CMP_U32(ConditionOp::GT, true, true, inst);
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case Opcode::V_CMPX_LT_I32:
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return V_CMP_U32(ConditionOp::LT, true, true, inst);
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case Opcode::V_CMPX_F_U32:
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