spirv: Simplify shared memory handling
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ad3b6c793c
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2c723949a0
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@ -93,15 +93,9 @@ Id EmitUndefU8(EmitContext& ctx);
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Id EmitUndefU16(EmitContext& ctx);
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Id EmitUndefU32(EmitContext& ctx);
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Id EmitUndefU64(EmitContext& ctx);
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Id EmitLoadSharedU8(EmitContext& ctx, Id offset);
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Id EmitLoadSharedS8(EmitContext& ctx, Id offset);
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Id EmitLoadSharedU16(EmitContext& ctx, Id offset);
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Id EmitLoadSharedS16(EmitContext& ctx, Id offset);
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Id EmitLoadSharedU32(EmitContext& ctx, Id offset);
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Id EmitLoadSharedU64(EmitContext& ctx, Id offset);
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Id EmitLoadSharedU128(EmitContext& ctx, Id offset);
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void EmitWriteSharedU8(EmitContext& ctx, Id offset, Id value);
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void EmitWriteSharedU16(EmitContext& ctx, Id offset, Id value);
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void EmitWriteSharedU32(EmitContext& ctx, Id offset, Id value);
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void EmitWriteSharedU64(EmitContext& ctx, Id offset, Id value);
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void EmitWriteSharedU128(EmitContext& ctx, Id offset, Id value);
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@ -5,84 +5,15 @@
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#include "shader_recompiler/backend/spirv/spirv_emit_context.h"
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namespace Shader::Backend::SPIRV {
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namespace {
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Id Pointer(EmitContext& ctx, Id pointer_type, Id array, Id offset, u32 shift) {
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const Id shift_id{ctx.ConstU32(shift)};
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const Id index{ctx.OpShiftRightArithmetic(ctx.U32[1], offset, shift_id)};
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return ctx.OpAccessChain(pointer_type, array, ctx.u32_zero_value, index);
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}
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Id Word(EmitContext& ctx, Id offset) {
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Id EmitLoadSharedU32(EmitContext& ctx, Id offset) {
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const Id shift_id{ctx.ConstU32(2U)};
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const Id index{ctx.OpShiftRightArithmetic(ctx.U32[1], offset, shift_id)};
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const Id pointer{ctx.OpAccessChain(ctx.shared_u32, ctx.shared_memory_u32, index)};
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return ctx.OpLoad(ctx.U32[1], pointer);
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}
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std::pair<Id, Id> ExtractArgs(EmitContext& ctx, Id offset, u32 mask, u32 count) {
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const Id shift{ctx.OpShiftLeftLogical(ctx.U32[1], offset, ctx.ConstU32(3U))};
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const Id bit{ctx.OpBitwiseAnd(ctx.U32[1], shift, ctx.ConstU32(mask))};
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const Id count_id{ctx.ConstU32(count)};
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return {bit, count_id};
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}
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} // Anonymous namespace
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Id EmitLoadSharedU8(EmitContext& ctx, Id offset) {
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if (ctx.profile.support_explicit_workgroup_layout) {
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const Id pointer{
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ctx.OpAccessChain(ctx.shared_u8, ctx.shared_memory_u8, ctx.u32_zero_value, offset)};
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return ctx.OpUConvert(ctx.U32[1], ctx.OpLoad(ctx.U8, pointer));
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} else {
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const auto [bit, count]{ExtractArgs(ctx, offset, 24, 8)};
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return ctx.OpBitFieldUExtract(ctx.U32[1], Word(ctx, offset), bit, count);
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}
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}
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Id EmitLoadSharedS8(EmitContext& ctx, Id offset) {
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if (ctx.profile.support_explicit_workgroup_layout) {
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const Id pointer{
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ctx.OpAccessChain(ctx.shared_u8, ctx.shared_memory_u8, ctx.u32_zero_value, offset)};
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return ctx.OpSConvert(ctx.U32[1], ctx.OpLoad(ctx.U8, pointer));
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} else {
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const auto [bit, count]{ExtractArgs(ctx, offset, 24, 8)};
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return ctx.OpBitFieldSExtract(ctx.U32[1], Word(ctx, offset), bit, count);
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}
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}
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Id EmitLoadSharedU16(EmitContext& ctx, Id offset) {
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if (ctx.profile.support_explicit_workgroup_layout) {
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const Id pointer{Pointer(ctx, ctx.shared_u16, ctx.shared_memory_u16, offset, 1)};
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return ctx.OpUConvert(ctx.U32[1], ctx.OpLoad(ctx.U16, pointer));
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} else {
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const auto [bit, count]{ExtractArgs(ctx, offset, 16, 16)};
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return ctx.OpBitFieldUExtract(ctx.U32[1], Word(ctx, offset), bit, count);
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}
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}
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Id EmitLoadSharedS16(EmitContext& ctx, Id offset) {
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if (ctx.profile.support_explicit_workgroup_layout) {
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const Id pointer{Pointer(ctx, ctx.shared_u16, ctx.shared_memory_u16, offset, 1)};
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return ctx.OpSConvert(ctx.U32[1], ctx.OpLoad(ctx.U16, pointer));
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} else {
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const auto [bit, count]{ExtractArgs(ctx, offset, 16, 16)};
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return ctx.OpBitFieldSExtract(ctx.U32[1], Word(ctx, offset), bit, count);
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}
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}
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Id EmitLoadSharedU32(EmitContext& ctx, Id offset) {
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if (ctx.profile.support_explicit_workgroup_layout) {
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const Id pointer{Pointer(ctx, ctx.shared_u32, ctx.shared_memory_u32, offset, 2)};
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return ctx.OpLoad(ctx.U32[1], pointer);
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} else {
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return Word(ctx, offset);
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}
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}
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Id EmitLoadSharedU64(EmitContext& ctx, Id offset) {
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if (ctx.profile.support_explicit_workgroup_layout) {
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const Id pointer{Pointer(ctx, ctx.shared_u32x2, ctx.shared_memory_u32x2, offset, 3)};
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return ctx.OpLoad(ctx.U32[2], pointer);
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} else {
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const Id shift_id{ctx.ConstU32(2U)};
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const Id base_index{ctx.OpShiftRightArithmetic(ctx.U32[1], offset, shift_id)};
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const Id next_index{ctx.OpIAdd(ctx.U32[1], base_index, ctx.ConstU32(1U))};
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@ -91,13 +22,8 @@ Id EmitLoadSharedU64(EmitContext& ctx, Id offset) {
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return ctx.OpCompositeConstruct(ctx.U32[2], ctx.OpLoad(ctx.U32[1], lhs_pointer),
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ctx.OpLoad(ctx.U32[1], rhs_pointer));
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}
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}
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Id EmitLoadSharedU128(EmitContext& ctx, Id offset) {
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if (ctx.profile.support_explicit_workgroup_layout) {
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const Id pointer{Pointer(ctx, ctx.shared_u32x4, ctx.shared_memory_u32x4, offset, 4)};
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return ctx.OpLoad(ctx.U32[4], pointer);
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}
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const Id shift_id{ctx.ConstU32(2U)};
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const Id base_index{ctx.OpShiftRightArithmetic(ctx.U32[1], offset, shift_id)};
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std::array<Id, 4> values{};
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@ -109,35 +35,14 @@ Id EmitLoadSharedU128(EmitContext& ctx, Id offset) {
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return ctx.OpCompositeConstruct(ctx.U32[4], values);
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}
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void EmitWriteSharedU8(EmitContext& ctx, Id offset, Id value) {
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const Id pointer{
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ctx.OpAccessChain(ctx.shared_u8, ctx.shared_memory_u8, ctx.u32_zero_value, offset)};
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ctx.OpStore(pointer, ctx.OpUConvert(ctx.U8, value));
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}
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void EmitWriteSharedU16(EmitContext& ctx, Id offset, Id value) {
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const Id pointer{Pointer(ctx, ctx.shared_u16, ctx.shared_memory_u16, offset, 1)};
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ctx.OpStore(pointer, ctx.OpUConvert(ctx.U16, value));
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}
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void EmitWriteSharedU32(EmitContext& ctx, Id offset, Id value) {
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Id pointer{};
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if (ctx.profile.support_explicit_workgroup_layout) {
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pointer = Pointer(ctx, ctx.shared_u32, ctx.shared_memory_u32, offset, 2);
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} else {
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const Id shift{ctx.ConstU32(2U)};
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const Id word_offset{ctx.OpShiftRightArithmetic(ctx.U32[1], offset, shift)};
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pointer = ctx.OpAccessChain(ctx.shared_u32, ctx.shared_memory_u32, word_offset);
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}
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const Id pointer = ctx.OpAccessChain(ctx.shared_u32, ctx.shared_memory_u32, word_offset);
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ctx.OpStore(pointer, value);
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}
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void EmitWriteSharedU64(EmitContext& ctx, Id offset, Id value) {
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if (ctx.profile.support_explicit_workgroup_layout) {
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const Id pointer{Pointer(ctx, ctx.shared_u32x2, ctx.shared_memory_u32x2, offset, 3)};
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ctx.OpStore(pointer, value);
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return;
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}
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const Id shift{ctx.ConstU32(2U)};
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const Id word_offset{ctx.OpShiftRightArithmetic(ctx.U32[1], offset, shift)};
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const Id next_offset{ctx.OpIAdd(ctx.U32[1], word_offset, ctx.ConstU32(1U))};
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@ -148,11 +53,6 @@ void EmitWriteSharedU64(EmitContext& ctx, Id offset, Id value) {
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}
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void EmitWriteSharedU128(EmitContext& ctx, Id offset, Id value) {
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if (ctx.profile.support_explicit_workgroup_layout) {
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const Id pointer{Pointer(ctx, ctx.shared_u32x4, ctx.shared_memory_u32x4, offset, 4)};
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ctx.OpStore(pointer, value);
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return;
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}
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const Id shift{ctx.ConstU32(2U)};
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const Id base_index{ctx.OpShiftRightArithmetic(ctx.U32[1], offset, shift)};
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for (u32 i = 0; i < 4; ++i) {
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@ -513,43 +513,9 @@ void EmitContext::DefineSharedMemory() {
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if (info.shared_memory_size == 0) {
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info.shared_memory_size = DefaultSharedMemSize;
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}
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const auto make{[&](Id element_type, u32 element_size) {
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const u32 num_elements{Common::DivCeil(info.shared_memory_size, element_size)};
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const Id array_type{TypeArray(element_type, ConstU32(num_elements))};
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Decorate(array_type, spv::Decoration::ArrayStride, element_size);
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const Id struct_type{TypeStruct(array_type)};
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MemberDecorate(struct_type, 0U, spv::Decoration::Offset, 0U);
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Decorate(struct_type, spv::Decoration::Block);
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const Id pointer{TypePointer(spv::StorageClass::Workgroup, struct_type)};
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const Id element_pointer{TypePointer(spv::StorageClass::Workgroup, element_type)};
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const Id variable{AddGlobalVariable(pointer, spv::StorageClass::Workgroup)};
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Decorate(variable, spv::Decoration::Aliased);
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interfaces.push_back(variable);
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return std::make_tuple(variable, element_pointer, pointer);
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}};
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if (profile.support_explicit_workgroup_layout) {
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AddExtension("SPV_KHR_workgroup_memory_explicit_layout");
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AddCapability(spv::Capability::WorkgroupMemoryExplicitLayoutKHR);
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if (info.uses_shared_u8) {
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AddCapability(spv::Capability::WorkgroupMemoryExplicitLayout8BitAccessKHR);
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std::tie(shared_memory_u8, shared_u8, std::ignore) = make(U8, 1);
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}
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if (info.uses_shared_u16) {
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AddCapability(spv::Capability::WorkgroupMemoryExplicitLayout16BitAccessKHR);
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std::tie(shared_memory_u16, shared_u16, std::ignore) = make(U16, 2);
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}
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std::tie(shared_memory_u32, shared_u32, shared_memory_u32_type) = make(U32[1], 4);
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std::tie(shared_memory_u32x2, shared_u32x2, std::ignore) = make(U32[2], 8);
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std::tie(shared_memory_u32x4, shared_u32x4, std::ignore) = make(U32[4], 16);
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return;
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}
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const u32 num_elements{Common::DivCeil(info.shared_memory_size, 4U)};
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const Id type{TypeArray(U32[1], ConstU32(num_elements))};
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shared_memory_u32_type = TypePointer(spv::StorageClass::Workgroup, type);
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shared_u32 = TypePointer(spv::StorageClass::Workgroup, U32[1]);
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shared_memory_u32 = AddGlobalVariable(shared_memory_u32_type, spv::StorageClass::Workgroup);
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interfaces.push_back(shared_memory_u32);
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@ -259,10 +259,6 @@ void IREmitter::SetAttribute(IR::Attribute attribute, const F32& value, u32 comp
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Value IREmitter::LoadShared(int bit_size, bool is_signed, const U32& offset) {
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switch (bit_size) {
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case 8:
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return Inst<U32>(is_signed ? Opcode::LoadSharedS8 : Opcode::LoadSharedU8, offset);
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case 16:
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return Inst<U32>(is_signed ? Opcode::LoadSharedS16 : Opcode::LoadSharedU16, offset);
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case 32:
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return Inst<U32>(Opcode::LoadSharedU32, offset);
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case 64:
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@ -276,12 +272,6 @@ Value IREmitter::LoadShared(int bit_size, bool is_signed, const U32& offset) {
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void IREmitter::WriteShared(int bit_size, const Value& value, const U32& offset) {
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switch (bit_size) {
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case 8:
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Inst(Opcode::WriteSharedU8, offset, value);
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break;
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case 16:
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Inst(Opcode::WriteSharedU16, offset, value);
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break;
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case 32:
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Inst(Opcode::WriteSharedU32, offset, value);
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break;
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@ -59,8 +59,6 @@ bool Inst::MayHaveSideEffects() const noexcept {
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case Opcode::WriteSharedU128:
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case Opcode::WriteSharedU64:
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case Opcode::WriteSharedU32:
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case Opcode::WriteSharedU16:
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case Opcode::WriteSharedU8:
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case Opcode::ImageWrite:
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case Opcode::ImageAtomicIAdd32:
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case Opcode::ImageAtomicSMin32:
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@ -26,15 +26,9 @@ OPCODE(WorkgroupMemoryBarrier, Void,
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OPCODE(DeviceMemoryBarrier, Void, )
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// Shared memory operations
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OPCODE(LoadSharedU8, U32, U32, )
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OPCODE(LoadSharedS8, U32, U32, )
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OPCODE(LoadSharedU16, U32, U32, )
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OPCODE(LoadSharedS16, U32, U32, )
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OPCODE(LoadSharedU32, U32, U32, )
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OPCODE(LoadSharedU64, U32x2, U32, )
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OPCODE(LoadSharedU128, U32x4, U32, )
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OPCODE(WriteSharedU8, Void, U32, U32, )
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OPCODE(WriteSharedU16, Void, U32, U32, )
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OPCODE(WriteSharedU32, Void, U32, U32, )
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OPCODE(WriteSharedU64, Void, U32, U32x2, )
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OPCODE(WriteSharedU128, Void, U32, U32x4, )
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@ -16,18 +16,6 @@ void Visit(Info& info, IR::Inst& inst) {
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info.stores.Set(inst.Arg(0).Attribute(), inst.Arg(2).U32());
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break;
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}
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case IR::Opcode::LoadSharedS8:
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case IR::Opcode::LoadSharedU8:
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case IR::Opcode::WriteSharedU8:
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info.uses_shared_u8 = true;
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info.uses_shared = true;
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break;
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case IR::Opcode::LoadSharedS16:
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case IR::Opcode::LoadSharedU16:
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case IR::Opcode::WriteSharedU16:
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info.uses_shared_u16 = true;
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info.uses_shared = true;
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break;
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case IR::Opcode::LoadSharedU32:
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case IR::Opcode::LoadSharedU64:
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case IR::Opcode::WriteSharedU32:
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@ -195,8 +195,6 @@ struct Info {
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bool has_image_query{};
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bool uses_group_quad{};
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bool uses_shared{};
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bool uses_shared_u8{};
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bool uses_shared_u16{};
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bool uses_fp16{};
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bool uses_step_rates{};
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bool translation_failed{}; // indicates that shader has unsupported instructions
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