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This commit is contained in:
IndecisiveTurtle 2024-07-01 13:38:44 +03:00 committed by TheTurtle
parent 410ba37ec2
commit 20e83b4d53
17 changed files with 52 additions and 44 deletions
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4
src/emulator.cpp
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@ -29,8 +29,8 @@ namespace Core {
static constexpr s32 WindowWidth = 1280;
static constexpr s32 WindowHeight = 720;
Emulator::Emulator() : memory{Core::Memory::Instance()},
window{WindowWidth, WindowHeight, controller} {
Emulator::Emulator()
: memory{Core::Memory::Instance()}, window{WindowWidth, WindowHeight, controller} {
g_window = &window;
// Read configuration file.

4
src/shader_recompiler/backend/spirv/emit_spirv_context_get_set.cpp
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@ -203,7 +203,7 @@ void EmitStoreBufferF32x3(EmitContext& ctx, IR::Inst* inst, u32 handle, Id addre
for (u32 i = 0; i < 3; i++) {
const Id index{ctx.OpIAdd(ctx.U32[1], address, ctx.ConstU32(i))};
const Id ptr{
ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, index)};
ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, index)};
ctx.OpStore(ptr, ctx.OpCompositeExtract(ctx.F32[1], value, i));
}
return;
@ -220,7 +220,7 @@ void EmitStoreBufferF32x4(EmitContext& ctx, IR::Inst* inst, u32 handle, Id addre
for (u32 i = 0; i < 4; i++) {
const Id index{ctx.OpIAdd(ctx.U32[1], address, ctx.ConstU32(i))};
const Id ptr{
ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, index)};
ctx.OpAccessChain(buffer.pointer_type, buffer.id, ctx.u32_zero_value, index)};
ctx.OpStore(ptr, ctx.OpCompositeExtract(ctx.F32[1], value, i));
}
return;

10
src/shader_recompiler/backend/spirv/emit_spirv_image.cpp
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@ -28,7 +28,8 @@ Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id c
if (Sirit::ValidId(offset)) {
operands.Add(spv::ImageOperandsMask::ConstOffset, offset);
}
return ctx.OpImageSampleImplicitLod(ctx.F32[4], sampled_image, coords, operands.mask, operands.operands);
return ctx.OpImageSampleImplicitLod(ctx.F32[4], sampled_image, coords, operands.mask,
operands.operands);
}
Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id bias_lc,
@ -41,8 +42,8 @@ Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id c
spv::ImageOperandsMask::Lod, ctx.ConstF32(0.f));
}
Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle,
Id coords, Id dref, Id bias_lc, const IR::Value& offset) {
Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id dref,
Id bias_lc, const IR::Value& offset) {
const auto& texture = ctx.images[handle & 0xFFFF];
const Id image = ctx.OpLoad(texture.image_type, texture.id);
const Id sampler = ctx.OpLoad(ctx.sampler_type, ctx.samplers[handle >> 16]);
@ -91,7 +92,8 @@ Id EmitImageQueryDimensions(EmitContext& ctx, IR::Inst* inst, u32 handle, Id lod
const auto type = ctx.info.images[handle & 0xFFFF].type;
const Id zero = ctx.u32_zero_value;
const auto mips{[&] { return skip_mips ? zero : ctx.OpImageQueryLevels(ctx.U32[1], image); }};
const bool uses_lod{type != AmdGpu::ImageType::Color2DMsaa && type != AmdGpu::ImageType::Buffer};
const bool uses_lod{type != AmdGpu::ImageType::Color2DMsaa &&
type != AmdGpu::ImageType::Buffer};
const auto query{[&](Id type) {
return uses_lod ? ctx.OpImageQuerySizeLod(type, image, lod)
: ctx.OpImageQuerySize(type, image);

4
src/shader_recompiler/backend/spirv/emit_spirv_instructions.h
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@ -338,8 +338,8 @@ Id EmitImageSampleImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id c
Id offset);
Id EmitImageSampleExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id bias_lc,
Id offset);
Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle,
Id coords, Id dref, Id bias_lc, const IR::Value& offset);
Id EmitImageSampleDrefImplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id dref,
Id bias_lc, const IR::Value& offset);
Id EmitImageSampleDrefExplicitLod(EmitContext& ctx, IR::Inst* inst, u32 handle, Id coords, Id dref,
Id bias_lc, Id offset);
Id EmitImageGather(EmitContext& ctx, IR::Inst* inst, const IR::Value& index, Id coords,

3
src/shader_recompiler/backend/spirv/spirv_emit_context.cpp
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@ -265,7 +265,8 @@ void EmitContext::DefineBuffers(const Info& info) {
const Id struct_type{TypeStruct(record_array_type)};
if (std::ranges::find(type_ids, record_array_type.value, &Id::value) == type_ids.end()) {
Decorate(record_array_type, spv::Decoration::ArrayStride, 4);
const auto name = fmt::format("{}_cbuf_block_{}{}", stage, 'f', sizeof(float) * CHAR_BIT);
const auto name =
fmt::format("{}_cbuf_block_{}{}", stage, 'f', sizeof(float) * CHAR_BIT);
Name(struct_type, name);
Decorate(struct_type, spv::Decoration::Block);
MemberName(struct_type, 0, "data");

6
src/shader_recompiler/ir/ir_emitter.cpp
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@ -391,8 +391,8 @@ Value IREmitter::CompositeConstruct(const Value& e1, const Value& e2, const Valu
Value IREmitter::CompositeConstruct(const Value& e1, const Value& e2, const Value& e3,
const Value& e4) {
if (e1.Type() != e2.Type() || e1.Type() != e3.Type() || e1.Type() != e4.Type()) {
UNREACHABLE_MSG("Mismatching types {}, {}, {}, and {}", e1.Type(), e2.Type(),
e3.Type(), e4.Type());
UNREACHABLE_MSG("Mismatching types {}, {}, {}, and {}", e1.Type(), e2.Type(), e3.Type(),
e4.Type());
}
switch (e1.Type()) {
case Type::U32:
@ -647,7 +647,7 @@ F32F64 IREmitter::FPSaturate(const F32F64& value) {
F32F64 IREmitter::FPClamp(const F32F64& value, const F32F64& min_value, const F32F64& max_value) {
if (value.Type() != min_value.Type() || value.Type() != max_value.Type()) {
UNREACHABLE_MSG("Mismatching types {}, {}, and {}", value.Type(), min_value.Type(),
max_value.Type());
max_value.Type());
}
switch (value.Type()) {
case Type::F32:

12
src/video_core/renderer_vulkan/liverpool_to_vk.cpp
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@ -376,16 +376,20 @@ vk::Format SurfaceFormat(AmdGpu::DataFormat data_format, AmdGpu::NumberFormat nu
num_format == AmdGpu::NumberFormat::Snorm) {
return vk::Format::eR16G16Snorm;
}
if (data_format == AmdGpu::DataFormat::Format2_10_10_10 && num_format == AmdGpu::NumberFormat::Unorm) {
if (data_format == AmdGpu::DataFormat::Format2_10_10_10 &&
num_format == AmdGpu::NumberFormat::Unorm) {
return vk::Format::eA2R10G10B10UnormPack32;
}
if (data_format == AmdGpu::DataFormat::Format2_10_10_10 && num_format == AmdGpu::NumberFormat::Snorm) {
if (data_format == AmdGpu::DataFormat::Format2_10_10_10 &&
num_format == AmdGpu::NumberFormat::Snorm) {
return vk::Format::eA2R10G10B10SnormPack32;
}
if (data_format == AmdGpu::DataFormat::Format10_11_11 && num_format == AmdGpu::NumberFormat::Float) {
if (data_format == AmdGpu::DataFormat::Format10_11_11 &&
num_format == AmdGpu::NumberFormat::Float) {
return vk::Format::eB10G11R11UfloatPack32;
}
if (data_format == AmdGpu::DataFormat::Format16_16 && num_format == AmdGpu::NumberFormat::Float) {
if (data_format == AmdGpu::DataFormat::Format16_16 &&
num_format == AmdGpu::NumberFormat::Float) {
return vk::Format::eR16G16Sfloat;
}
UNREACHABLE_MSG("Unknown data_format={} and num_format={}", u32(data_format), u32(num_format));

3
src/video_core/renderer_vulkan/vk_compute_pipeline.cpp
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@ -126,7 +126,8 @@ bool ComputePipeline::BindResources(Core::MemoryManager* memory, StreamBuffer& s
}
for (const auto& image_desc : info.images) {
const auto tsharp = info.ReadUd<AmdGpu::Image>(image_desc.sgpr_base, image_desc.dword_offset);
const auto tsharp =
info.ReadUd<AmdGpu::Image>(image_desc.sgpr_base, image_desc.dword_offset);
const auto& image_view = texture_cache.FindImageView(tsharp, image_desc.is_storage);
const auto& image = texture_cache.GetImage(image_view.image_id);
image_infos.emplace_back(VK_NULL_HANDLE, *image_view.image_view, image.layout);

3
src/video_core/renderer_vulkan/vk_graphics_pipeline.cpp
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@ -349,7 +349,8 @@ void GraphicsPipeline::BindResources(Core::MemoryManager* memory, StreamBuffer&
}
for (const auto& image_desc : stage.images) {
const auto tsharp = stage.ReadUd<AmdGpu::Image>(image_desc.sgpr_base, image_desc.dword_offset);
const auto tsharp =
stage.ReadUd<AmdGpu::Image>(image_desc.sgpr_base, image_desc.dword_offset);
const auto& image_view = texture_cache.FindImageView(tsharp, image_desc.is_storage);
const auto& image = texture_cache.GetImage(image_view.image_id);
image_infos.emplace_back(VK_NULL_HANDLE, *image_view.image_view, image.layout);

4
src/video_core/renderer_vulkan/vk_pipeline_cache.cpp
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@ -258,8 +258,8 @@ std::unique_ptr<ComputePipeline> PipelineCache::CreateComputePipeline() {
DumpShader(spv_code, compute_key, Shader::Stage::Compute, "spv");
}
const auto module = CompileSPV(spv_code, instance.GetDevice());
return std::make_unique<ComputePipeline>(instance, scheduler, *pipeline_cache, &program.info,
module);
return std::make_unique<ComputePipeline>(instance, scheduler, *pipeline_cache,
&program.info, module);
} catch (const Shader::Exception& e) {
UNREACHABLE_MSG("{}", e.what());
return nullptr;

4
src/video_core/renderer_vulkan/vk_rasterizer.cpp
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@ -103,7 +103,7 @@ void Rasterizer::BeginRendering() {
.loadOp = is_clear ? vk::AttachmentLoadOp::eClear : vk::AttachmentLoadOp::eLoad,
.storeOp = vk::AttachmentStoreOp::eStore,
.clearValue =
is_clear ? LiverpoolToVK::ColorBufferClearValue(col_buf) : vk::ClearValue{},
is_clear ? LiverpoolToVK::ColorBufferClearValue(col_buf) : vk::ClearValue{},
};
texture_cache.TouchMeta(col_buf.CmaskAddress(), false);
}
@ -137,7 +137,7 @@ u32 Rasterizer::SetupIndexBuffer(bool& is_indexed, u32 index_offset) {
// Emulate QuadList primitive type with CPU made index buffer.
const auto& regs = liverpool->regs;
if (liverpool->regs.primitive_type == Liverpool::PrimitiveType::QuadList) {
//ASSERT_MSG(!is_indexed, "Using QuadList primitive with indexed draw");
// ASSERT_MSG(!is_indexed, "Using QuadList primitive with indexed draw");
is_indexed = true;
// Emit indices.

13
src/video_core/renderer_vulkan/vk_scheduler.cpp
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@ -27,15 +27,16 @@ void Scheduler::BeginRendering(const RenderState& new_state) {
render_state = new_state;
const vk::RenderingInfo rendering_info = {
.renderArea = {
.offset = {0, 0},
.extent = {render_state.width, render_state.height},
},
.renderArea =
{
.offset = {0, 0},
.extent = {render_state.width, render_state.height},
},
.layerCount = 1,
.colorAttachmentCount = render_state.num_color_attachments,
.pColorAttachments = render_state.color_attachments.data(),
.pDepthAttachment = render_state.num_depth_attachments ?
&render_state.depth_attachment : nullptr,
.pDepthAttachment =
render_state.num_depth_attachments ? &render_state.depth_attachment : nullptr,
};
current_cmdbuf.beginRendering(rendering_info);

2
src/video_core/renderer_vulkan/vk_stream_buffer.cpp
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@ -226,7 +226,7 @@ void StreamBuffer::WaitPendingOperations(u64 requested_upper_bound) {
while (requested_upper_bound > wait_bound && wait_cursor < *invalidation_mark) {
auto& watch = previous_watches[wait_cursor];
wait_bound = watch.upper_bound;
//scheduler.Wait(watch.tick);
// scheduler.Wait(watch.tick);
++wait_cursor;
}
}

3
src/video_core/texture_cache/image_view.cpp
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@ -71,8 +71,7 @@ ImageViewInfo::ImageViewInfo(const AmdGpu::Liverpool::ColorBuffer& col_buffer,
}
ImageView::ImageView(const Vulkan::Instance& instance, const ImageViewInfo& info_, Image& image,
ImageId image_id_,
std::optional<vk::ImageUsageFlags> usage_override /*= {}*/)
ImageId image_id_, std::optional<vk::ImageUsageFlags> usage_override /*= {}*/)
: info{info_}, image_id{image_id_} {
vk::ImageViewUsageCreateInfo usage_ci{};
if (usage_override) {

3
src/video_core/texture_cache/image_view.h
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@ -36,8 +36,7 @@ struct Image;
struct ImageView {
explicit ImageView(const Vulkan::Instance& instance, const ImageViewInfo& info, Image& image,
ImageId image_id,
std::optional<vk::ImageUsageFlags> usage_override = {});
ImageId image_id, std::optional<vk::ImageUsageFlags> usage_override = {});
~ImageView();
ImageView(const ImageView&) = delete;

16
src/video_core/texture_cache/texture_cache.cpp
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@ -162,7 +162,8 @@ ImageView& TextureCache::RegisterImageView(ImageId image_id, const ImageViewInfo
usage_override = image.usage & ~vk::ImageUsageFlagBits::eStorage;
}
const ImageViewId view_id = slot_image_views.insert(instance, view_info, image, image_id, usage_override);
const ImageViewId view_id =
slot_image_views.insert(instance, view_info, image, image_id, usage_override);
image.image_view_infos.emplace_back(view_info);
image.image_view_ids.emplace_back(view_id);
return slot_image_views[view_id];
@ -178,8 +179,9 @@ ImageView& TextureCache::FindImageView(const AmdGpu::Image& desc, bool is_storag
image.Transit(vk::ImageLayout::eGeneral, vk::AccessFlagBits::eShaderWrite);
usage.storage = true;
} else {
const auto new_layout = image.info.IsDepthStencil() ? vk::ImageLayout::eDepthStencilReadOnlyOptimal
: vk::ImageLayout::eShaderReadOnlyOptimal;
const auto new_layout = image.info.IsDepthStencil()
? vk::ImageLayout::eDepthStencilReadOnlyOptimal
: vk::ImageLayout::eShaderReadOnlyOptimal;
image.Transit(new_layout, vk::AccessFlagBits::eShaderRead);
usage.texture = true;
}
@ -206,8 +208,7 @@ ImageView& TextureCache::RenderTarget(const AmdGpu::Liverpool::ColorBuffer& buff
}
ImageView& TextureCache::DepthTarget(const AmdGpu::Liverpool::DepthBuffer& buffer,
VAddr htile_address,
const AmdGpu::Liverpool::CbDbExtent& hint,
VAddr htile_address, const AmdGpu::Liverpool::CbDbExtent& hint,
bool write_enabled) {
const ImageInfo info{buffer, htile_address, hint};
const ImageId image_id = FindImage(info, buffer.Address(), false);
@ -216,9 +217,8 @@ ImageView& TextureCache::DepthTarget(const AmdGpu::Liverpool::DepthBuffer& buffe
const auto new_layout = write_enabled ? vk::ImageLayout::eDepthStencilAttachmentOptimal
: vk::ImageLayout::eDepthStencilReadOnlyOptimal;
image.Transit(new_layout,
vk::AccessFlagBits::eDepthStencilAttachmentWrite |
vk::AccessFlagBits::eDepthStencilAttachmentRead);
image.Transit(new_layout, vk::AccessFlagBits::eDepthStencilAttachmentWrite |
vk::AccessFlagBits::eDepthStencilAttachmentRead);
image.info.usage.depth_target = true;