2024-05-22 00:35:12 +02:00
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// SPDX-FileCopyrightText: Copyright 2024 shadPS4 Emulator Project
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// SPDX-License-Identifier: GPL-2.0-or-later
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#pragma once
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2024-05-25 14:33:15 +02:00
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#include <span>
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2024-06-01 19:25:31 +02:00
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#include <vector>
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#include <boost/container/static_vector.hpp>
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#include "common/assert.h"
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#include "common/types.h"
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#include "shader_recompiler/ir/attribute.h"
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2024-05-26 14:51:35 +02:00
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#include "shader_recompiler/ir/reg.h"
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#include "shader_recompiler/ir/type.h"
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#include "video_core/amdgpu/resource.h"
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namespace Shader {
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static constexpr size_t NumUserDataRegs = 16;
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enum class Stage : u32 {
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Vertex,
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TessellationControl,
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TessellationEval,
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Geometry,
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Fragment,
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Compute,
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};
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constexpr u32 MaxStageTypes = 6;
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[[nodiscard]] constexpr Stage StageFromIndex(size_t index) noexcept {
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return static_cast<Stage>(static_cast<size_t>(Stage::Vertex) + index);
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}
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enum class TextureType : u32 {
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Color1D,
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ColorArray1D,
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Color2D,
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ColorArray2D,
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Color3D,
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ColorCube,
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Buffer,
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};
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constexpr u32 NUM_TEXTURE_TYPES = 7;
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struct BufferResource {
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u32 sgpr_base;
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u32 dword_offset;
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u32 stride;
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u32 num_records;
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IR::Type used_types;
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bool is_storage;
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auto operator<=>(const BufferResource&) const = default;
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};
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using BufferResourceList = boost::container::static_vector<BufferResource, 8>;
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struct ImageResource {
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u32 sgpr_base;
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u32 dword_offset;
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AmdGpu::ImageType type;
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AmdGpu::NumberFormat nfmt;
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bool is_storage;
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bool is_depth;
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};
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using ImageResourceList = boost::container::static_vector<ImageResource, 8>;
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struct SamplerResource {
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u32 sgpr_base;
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u32 dword_offset;
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};
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using SamplerResourceList = boost::container::static_vector<SamplerResource, 8>;
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struct Info {
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struct VsInput {
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AmdGpu::NumberFormat fmt;
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u16 binding;
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u16 num_components;
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u8 sgpr_base;
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u8 dword_offset;
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};
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boost::container::static_vector<VsInput, 32> vs_inputs{};
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struct PsInput {
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u32 param_index;
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bool is_default;
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bool is_flat;
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u32 default_value;
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};
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boost::container::static_vector<PsInput, 32> ps_inputs{};
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struct AttributeFlags {
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bool Get(IR::Attribute attrib, u32 comp = 0) const {
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return flags[Index(attrib)] & (1 << comp);
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}
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bool GetAny(IR::Attribute attrib) const {
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return flags[Index(attrib)];
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}
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void Set(IR::Attribute attrib, u32 comp = 0) {
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flags[Index(attrib)] |= (1 << comp);
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}
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u32 NumComponents(IR::Attribute attrib) const {
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const u8 mask = flags[Index(attrib)];
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ASSERT(mask != 0b1011 || mask != 0b1101);
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return std::popcount(mask);
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}
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static size_t Index(IR::Attribute attrib) {
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return static_cast<size_t>(attrib);
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}
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std::array<u8, IR::NumAttributes> flags;
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};
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AttributeFlags loads{};
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AttributeFlags stores{};
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BufferResourceList buffers;
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ImageResourceList images;
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SamplerResourceList samplers;
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2024-05-29 00:28:34 +02:00
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std::array<u32, 3> workgroup_size{};
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u32 num_user_data;
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std::span<const u32> user_data;
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Stage stage;
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template <typename T>
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T ReadUd(u32 ptr_index, u32 dword_offset) const noexcept {
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T data;
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const u32* base = user_data.data();
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if (ptr_index != IR::NumScalarRegs) {
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std::memcpy(&base, &user_data[ptr_index], sizeof(base));
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}
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std::memcpy(&data, base + dword_offset, sizeof(T));
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return data;
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}
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};
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} // namespace Shader
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template <>
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struct fmt::formatter<Shader::Stage> {
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constexpr auto parse(format_parse_context& ctx) {
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return ctx.begin();
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}
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auto format(const Shader::Stage& stage, format_context& ctx) const {
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constexpr static std::array names = {"vs", "tc", "te", "gs", "fs", "cs"};
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return fmt::format_to(ctx.out(), "{}", names[static_cast<size_t>(stage)]);
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}
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};
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